commit ebf52e80c1d0d35686438828322aab5aec2c7bbe
author Craig Topper <craig.topper@intel.com> Wed Apr 18 22:07:53 2018 +0000
committer Craig Topper <craig.topper@intel.com> Wed Apr 18 22:07:53 2018 +0000
tree 15dacfe9f1ac0447e3e9013836b60c6884705dd3
parent 02f7841e4a8c3a5d1a0b2819c3394a85c279625b

[X86] Correct the Defs, Uses, hasSideEffects, mayLoad, mayStore for XCHG and XADD instructions.

I don't think we emit any of these from codegen except for using XCHG16ar as 2 byte NOP.

llvm-svn: 330298

llvm/lib/Target/X86/X86MCInstLower.cpp

diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index b139f9c..9b0f2a6 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -1146,7 +1146,7 @@
     OS.EmitInstruction(MCInstBuilder(Opc), STI);
     break;
   case X86::XCHG16ar:
-    OS.EmitInstruction(MCInstBuilder(Opc).addReg(X86::AX), STI);
+    OS.EmitInstruction(MCInstBuilder(Opc).addReg(X86::AX).addReg(X86::AX), STI);
     break;
   case X86::NOOPL:
   case X86::NOOPW: