Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.
Differential revision: http://reviews.llvm.org/D16793
llvm-svn: 259539
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index dfd25bd..612f6c8 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -54,6 +54,7 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+
using namespace llvm;
#define DEBUG_TYPE "dwarfdebug"
@@ -297,7 +298,6 @@
Class = In.slice(In.find('[') + 1, In.find('('));
Category = In.slice(In.find('[') + 1, In.find(' '));
- return;
}
static StringRef getObjCMethodName(StringRef In) {
@@ -530,7 +530,6 @@
});
}
-
// Collect info for variables that were optimized out.
void DwarfDebug::collectDeadVariables() {
const Module *M = MMI->getModule();
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 859d45c..2666951 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -59,6 +59,7 @@
#include "llvm/Target/TargetSubtargetInfo.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include <algorithm>
+
using namespace llvm;
#define DEBUG_TYPE "isel"
@@ -317,7 +318,7 @@
"Unknown sched type!");
return createILPListDAGScheduler(IS, OptLevel);
}
-}
+} // end namespace llvm
// EmitInstrWithCustomInserter - This method should be implemented by targets
// that mark instructions with the 'usesCustomInserter' flag. These
@@ -854,7 +855,8 @@
Scheduler->Run(CurDAG, FuncInfo->MBB);
}
- if (ViewSUnitDAGs && MatchFilterBB) Scheduler->viewGraph();
+ if (ViewSUnitDAGs && MatchFilterBB)
+ Scheduler->viewGraph();
// Emit machine code to BB. This can change 'BB' to the last block being
// inserted into.
@@ -1147,7 +1149,7 @@
case Instruction::LandingPad: NumFastIselFailLandingPad++; return;
}
}
-#endif
+#endif // NDEBUG
void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
// Initialize the Fast-ISel state, if needed.
@@ -1454,7 +1456,6 @@
void
SelectionDAGISel::FinishBasicBlock() {
-
DEBUG(dbgs() << "Total amount of phi nodes to update: "
<< FuncInfo->PHINodesToUpdate.size() << "\n";
for (unsigned i = 0, e = FuncInfo->PHINodesToUpdate.size(); i != e; ++i)
@@ -1685,7 +1686,6 @@
SDB->SwitchCases.clear();
}
-
/// Create the scheduler. If a specific scheduler was specified
/// via the SchedulerRegistry, use it, otherwise select the
/// one preferred by the target.
@@ -1996,8 +1996,6 @@
return New.getNode();
}
-
-
SDNode *SelectionDAGISel::Select_UNDEF(SDNode *N) {
return CurDAG->SelectNodeTo(N, TargetOpcode::IMPLICIT_DEF,N->getValueType(0));
}
@@ -2019,7 +2017,6 @@
return Val;
}
-
/// UpdateChainsAndGlue - When a match is complete, this method updates uses of
/// interior glue and chain results to use the new glue and chain results.
void SelectionDAGISel::
@@ -2223,7 +2220,6 @@
ChainedNodesInPattern.push_back(User);
InteriorChainedNodes.push_back(User);
}
- continue;
}
return Result;
@@ -2549,7 +2545,6 @@
}
namespace {
-
struct MatchScope {
/// FailIndex - If this match fails, this is the index to continue with.
unsigned FailIndex;
@@ -2606,7 +2601,7 @@
J.setNode(E);
}
};
-}
+} // end anonymous namespace
SDNode *SelectionDAGISel::
SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
@@ -3310,7 +3305,6 @@
InputGlue, GlueResultNodesMatched, true);
return Res;
}
-
continue;
}
@@ -3426,8 +3420,6 @@
}
}
-
-
void SelectionDAGISel::CannotYetSelect(SDNode *N) {
std::string msg;
raw_string_ostream Msg(msg);
diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index 6eaf991..74b4704 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -31,6 +31,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include <cctype>
+
using namespace llvm;
static cl::opt<bool> DisableHazardRecognizer(
@@ -76,8 +77,6 @@
/// may be overloaded in the target code to do that.
unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
const MCAsmInfo &MAI) const {
-
-
// Count the number of instructions in the asm.
bool atInsnStart = true;
unsigned Length = 0;
@@ -637,7 +636,6 @@
bool TargetInstrInfo::getMachineCombinerPatterns(
MachineInstr &Root,
SmallVectorImpl<MachineCombinerPattern> &Patterns) const {
-
bool Commute;
if (isReassociationCandidate(Root, Commute)) {
// We found a sequence of instructions that may be suitable for a
@@ -768,7 +766,6 @@
assert(Prev && "Unknown pattern for machine combiner");
reassociateOps(Root, *Prev, Pattern, InsInstrs, DelInstrs, InstIdxForVirtReg);
- return;
}
/// foldMemoryOperand - Same as the previous version except it allows folding
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index c6bae24..e8009cc 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -50,6 +50,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+
using namespace llvm;
#define DEBUG_TYPE "twoaddrinstr"
@@ -539,7 +540,6 @@
return TRI->regsOverlap(RegA, RegB);
}
-
/// Return true if it's potentially profitable to commute the two-address
/// instruction that's being processed.
bool
@@ -808,7 +808,6 @@
}
Processed.insert(MI);
- return;
}
/// If there is one more local instruction that reads 'Reg' and it kills 'Reg,