commit ed04f024324dce23beee1128abd6f2584df1bb43
author Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Apr 06 17:51:57 2018 +0000
committer Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Apr 06 17:51:57 2018 +0000
tree 701c2df7f3b5371d3026a16b11586b00be6af118
parent 93af966747b59d37c57312a0c0242151076c072b

[Hexagon] Handle subregisters when calculating iteration count in HW loops

llvm-svn: 329434

llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp

diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
index 715fd52..0703606 100644
--- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
@@ -928,6 +928,7 @@
       // 'Add' instruction.
       const MachineInstr *EndValInstr = MRI->getVRegDef(End->getReg());
       if (EndValInstr->getOpcode() == Hexagon::A2_addi &&
+          EndValInstr->getOperand(1).getSubReg() == 0 &&
           EndValInstr->getOperand(2).getImm() == StartV) {
         DistR = EndValInstr->getOperand(1).getReg();
       } else {