AMDGPU: Do not emit deprecated notes for code object v3
Differential Revision: https://reviews.llvm.org/D38749
llvm-svn: 315810
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index 1f6f59c..ba936dd 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -408,6 +408,13 @@
"Hardware automatically inserts waitcnt before barrier"
>;
+def FeatureCodeObjectV3 : SubtargetFeature <
+ "code-object-v3",
+ "CodeObjectV3",
+ "true",
+ "Generate code object version 3"
+>;
+
// Dummy feature used to disable assembler instructions.
def FeatureDisable : SubtargetFeature<"",
"FeatureDisable","true",
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index bbe0879..ca828b4 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -112,23 +112,31 @@
}
void AMDGPUAsmPrinter::EmitStartOfAsmFile(Module &M) {
- AMDGPU::IsaInfo::IsaVersion ISA =
- AMDGPU::IsaInfo::getIsaVersion(getSTI()->getFeatureBits());
-
- if (TM.getTargetTriple().getOS() == Triple::AMDPAL) {
- readPALMetadata(M);
- // AMDPAL wants an HSA_ISA .note.
- getTargetStreamer().EmitDirectiveHSACodeObjectISA(
- ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
- }
- if (TM.getTargetTriple().getOS() != Triple::AMDHSA)
+ if (TM.getTargetTriple().getArch() != Triple::amdgcn)
return;
- getTargetStreamer().EmitDirectiveHSACodeObjectVersion(2, 1);
+ if (TM.getTargetTriple().getOS() != Triple::AMDHSA &&
+ TM.getTargetTriple().getOS() != Triple::AMDPAL)
+ return;
+
+ if (TM.getTargetTriple().getOS() == Triple::AMDHSA)
+ HSAMetadataStream.begin(M);
+
+ if (TM.getTargetTriple().getOS() == Triple::AMDPAL)
+ readPALMetadata(M);
+
+ // Deprecated notes are not emitted for code object v3.
+ if (IsaInfo::hasCodeObjectV3(getSTI()->getFeatureBits()))
+ return;
+
+ // HSA emits NT_AMDGPU_HSA_CODE_OBJECT_VERSION for code objects v2.
+ if (TM.getTargetTriple().getOS() == Triple::AMDHSA)
+ getTargetStreamer().EmitDirectiveHSACodeObjectVersion(2, 1);
+
+ // HSA and PAL emit NT_AMDGPU_HSA_ISA for code objects v2.
+ IsaInfo::IsaVersion ISA = IsaInfo::getIsaVersion(getSTI()->getFeatureBits());
getTargetStreamer().EmitDirectiveHSACodeObjectISA(
ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
-
- HSAMetadataStream.begin(M);
}
void AMDGPUAsmPrinter::EmitEndOfAsmFile(Module &M) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index 59f9baf..ddc1cd4 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -110,6 +110,7 @@
DX10Clamp(false),
FlatForGlobal(false),
AutoWaitcntBeforeBarrier(false),
+ CodeObjectV3(false),
UnalignedScratchAccess(false),
UnalignedBufferAccess(false),
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index 0f725c1..52e08e5 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -119,6 +119,7 @@
bool DX10Clamp;
bool FlatForGlobal;
bool AutoWaitcntBeforeBarrier;
+ bool CodeObjectV3;
bool UnalignedScratchAccess;
bool UnalignedBufferAccess;
bool HasApertureRegs;
@@ -399,6 +400,10 @@
return AutoWaitcntBeforeBarrier;
}
+ bool hasCodeObjectV3() const {
+ return CodeObjectV3;
+ }
+
bool hasUnalignedBufferAccess() const {
return UnalignedBufferAccess;
}
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index ce9dc4f..018cb5d0 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -162,6 +162,10 @@
Stream.flush();
}
+bool hasCodeObjectV3(const FeatureBitset &Features) {
+ return Features.test(FeatureCodeObjectV3);
+}
+
unsigned getWavefrontSize(const FeatureBitset &Features) {
if (Features.test(FeatureWavefrontSize16))
return 16;
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
index aaa7b14..60a7af8 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -58,6 +58,10 @@
/// \brief Streams isa version string for given subtarget \p STI into \p Stream.
void streamIsaVersion(const MCSubtargetInfo *STI, raw_ostream &Stream);
+/// \returns True if given subtarget \p Features support code object version 3,
+/// false otherwise.
+bool hasCodeObjectV3(const FeatureBitset &Features);
+
/// \returns Wavefront size for given subtarget \p Features.
unsigned getWavefrontSize(const FeatureBitset &Features);
diff --git a/llvm/test/CodeGen/AMDGPU/elf-notes.ll b/llvm/test/CodeGen/AMDGPU/elf-notes.ll
index 3d9393c..663a352 100644
--- a/llvm/test/CodeGen/AMDGPU/elf-notes.ll
+++ b/llvm/test/CodeGen/AMDGPU/elf-notes.ll
@@ -1,24 +1,34 @@
-; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=gfx800 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=iceland < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=iceland < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx800 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=iceland < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
-; RUN: llc -march=r600 < %s | FileCheck --check-prefix=R600 %s
+; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=gfx800 -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=iceland -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx800 -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=iceland -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
+; RUN: llc -march=r600 -mattr=+code-object-v3 < %s | FileCheck --check-prefix=R600 %s
+; OSABI-UNK-NOT: .hsa_code_object_version
+; OSABI-UNK-NOT: .hsa_code_object_isa
; OSABI-UNK: .amd_amdgpu_isa "amdgcn-amd-unknown--gfx800"
; OSABI-UNK-NOT: .amd_amdgpu_hsa_metadata
; OSABI-UNK-NOT: .amd_amdgpu_pal_metadata
+; OSABI-HSA-NOT: .hsa_code_object_version
+; OSABI-HSA-NOT: .hsa_code_object_isa
; OSABI-HSA: .amd_amdgpu_isa "amdgcn-amd-amdhsa--gfx800"
; OSABI-HSA: .amd_amdgpu_hsa_metadata
+; OSABI-HSA-NOT: .amd_amdgpu_pal_metadata
+; OSABI-PAL-NOT: .hsa_code_object_version
+; OSABI-PAL-NOT: .hsa_code_object_isa
; OSABI-PAL: .amd_amdgpu_isa "amdgcn-amd-amdpal--gfx800"
+; OSABI-PAL-NOT: .amd_amdgpu_hsa_metadata
; OSABI-PAL: .amd_amdgpu_pal_metadata
+; R600-NOT: .hsa_code_object_version
+; R600-NOT: .hsa_code_object_isa
; R600-NOT: .amd_amdgpu_isa
; R600-NOT: .amd_amdgpu_hsa_metadata
-; R600-NOT: .amd_amdgpu_hsa_metadata
+; R600-NOT: .amd_amdgpu_pal_metadatas
define amdgpu_kernel void @elf_notes() {
ret void
diff --git a/llvm/test/MC/AMDGPU/isa-version-hsa.s b/llvm/test/MC/AMDGPU/isa-version-hsa.s
index 8917939..0c50880 100644
--- a/llvm/test/MC/AMDGPU/isa-version-hsa.s
+++ b/llvm/test/MC/AMDGPU/isa-version-hsa.s
@@ -6,7 +6,6 @@
// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=gfx800 %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL-ERR --check-prefix=GFX800 %s
// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=iceland %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL-ERR --check-prefix=GFX800 %s
-
// OSABI-HSA: .amd_amdgpu_isa "amdgcn-amd-amdhsa--gfx800"
// OSABI-UNK-ERR: error: .amd_amdgpu_isa directive does not match triple and/or mcpu arguments specified through the command line
// OSABI-HSA-ERR: error: .amd_amdgpu_isa directive does not match triple and/or mcpu arguments specified through the command line
diff --git a/llvm/test/MC/AMDGPU/isa-version-unk.s b/llvm/test/MC/AMDGPU/isa-version-unk.s
index f0fd9d2..c5e3f8af 100644
--- a/llvm/test/MC/AMDGPU/isa-version-unk.s
+++ b/llvm/test/MC/AMDGPU/isa-version-unk.s
@@ -6,7 +6,6 @@
// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=gfx800 %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL-ERR --check-prefix=GFX800 %s
// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=iceland %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL-ERR --check-prefix=GFX800 %s
-
// OSABI-UNK: .amd_amdgpu_isa "amdgcn-amd-unknown--gfx800"
// OSABI-UNK-ERR: error: .amd_amdgpu_isa directive does not match triple and/or mcpu arguments specified through the command line
// OSABI-HSA-ERR: error: .amd_amdgpu_isa directive does not match triple and/or mcpu arguments specified through the command line