commit ee9c2a17b823fe9c375002b4bec9ce989f5c66f5
author Guillaume Chatelet <gchatelet@google.com> Wed Oct 10 14:22:48 2018 +0000
committer Guillaume Chatelet <gchatelet@google.com> Wed Oct 10 14:22:48 2018 +0000
tree ed700f70d8ea65a7b4fc90d34d9b5e406a3e5cbd
parent 07acc992dc39edfccc5a4b773c3dcf8a5bf6d893

[llvm-exegesis][NFC] Code simplification

Summary: Simplify code by having LLVMState hold the RegisterAliasingTrackerCache.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53078

llvm-svn: 344143

llvm/tools/llvm-exegesis/lib/X86/Target.cpp

diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
index 4a9cb08..8c03f1a 100644
--- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
@@ -37,9 +37,9 @@
     }
 
     // Handle X87.
-    const auto &InstrDesc = InstrInfo.get(Opcode);
-    const unsigned FPInstClass = InstrDesc.TSFlags & llvm::X86II::FPTypeMask;
-    const Instruction Instr(InstrDesc, this->RATC);
+    const unsigned FPInstClass =
+        InstrInfo.get(Opcode).TSFlags & llvm::X86II::FPTypeMask;
+    const Instruction Instr(this->State, Opcode);
     switch (FPInstClass) {
     case llvm::X86II::NotFP:
       break;