Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.
llvm-svn: 229841
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 4dd7fb4..1040bf7 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -71,7 +71,15 @@
// The full table can be found in MipsGenSubtargetInfo.inc (MipsFeatureKV[]).
// The reason we need this mask is explained in the selectArch function.
// FIXME: Ideally we would like TableGen to generate this information.
- static const FeatureBitset AllArchRelatedMask;
+ static const uint64_t AllArchRelatedMask =
+ Mips::FeatureMips1 | Mips::FeatureMips2 | Mips::FeatureMips3 |
+ Mips::FeatureMips3_32 | Mips::FeatureMips3_32r2 | Mips::FeatureMips4 |
+ Mips::FeatureMips4_32 | Mips::FeatureMips4_32r2 | Mips::FeatureMips5 |
+ Mips::FeatureMips5_32r2 | Mips::FeatureMips32 | Mips::FeatureMips32r2 |
+ Mips::FeatureMips32r3 | Mips::FeatureMips32r5 | Mips::FeatureMips32r6 |
+ Mips::FeatureMips64 | Mips::FeatureMips64r2 | Mips::FeatureMips64r3 |
+ Mips::FeatureMips64r5 | Mips::FeatureMips64r6 | Mips::FeatureCnMips |
+ Mips::FeatureFP64Bit | Mips::FeatureGP64Bit | Mips::FeatureNaN2008;
private:
unsigned ATReg;
@@ -81,17 +89,6 @@
};
}
-const FeatureBitset MipsAssemblerOptions::AllArchRelatedMask = {
- Mips::FeatureMips1, Mips::FeatureMips2, Mips::FeatureMips3,
- Mips::FeatureMips3_32, Mips::FeatureMips3_32r2, Mips::FeatureMips4,
- Mips::FeatureMips4_32, Mips::FeatureMips4_32r2, Mips::FeatureMips5,
- Mips::FeatureMips5_32r2, Mips::FeatureMips32, Mips::FeatureMips32r2,
- Mips::FeatureMips32r3, Mips::FeatureMips32r5, Mips::FeatureMips32r6,
- Mips::FeatureMips64, Mips::FeatureMips64r2, Mips::FeatureMips64r3,
- Mips::FeatureMips64r5, Mips::FeatureMips64r6, Mips::FeatureCnMips,
- Mips::FeatureFP64Bit, Mips::FeatureGP64Bit, Mips::FeatureNaN2008
-};
-
namespace {
class MipsAsmParser : public MCTargetAsmParser {
MipsTargetStreamer &getTargetStreamer() {
@@ -296,7 +293,7 @@
// FeatureMipsGP64 | FeatureMips1)
// Clearing Mips3 is equivalent to clear (FeatureMips3 | FeatureMips4).
void selectArch(StringRef ArchFeature) {
- FeatureBitset FeatureBits = STI.getFeatureBits();
+ uint64_t FeatureBits = STI.getFeatureBits();
FeatureBits &= ~MipsAssemblerOptions::AllArchRelatedMask;
STI.setFeatureBits(FeatureBits);
setAvailableFeatures(
@@ -305,7 +302,7 @@
}
void setFeatureBits(uint64_t Feature, StringRef FeatureString) {
- if (!(STI.getFeatureBits()[Feature])) {
+ if (!(STI.getFeatureBits() & Feature)) {
setAvailableFeatures(
ComputeAvailableFeatures(STI.ToggleFeature(FeatureString)));
}
@@ -313,7 +310,7 @@
}
void clearFeatureBits(uint64_t Feature, StringRef FeatureString) {
- if (STI.getFeatureBits()[Feature]) {
+ if (STI.getFeatureBits() & Feature) {
setAvailableFeatures(
ComputeAvailableFeatures(STI.ToggleFeature(FeatureString)));
}
@@ -358,66 +355,65 @@
/// True if all of $fcc0 - $fcc7 exist for the current ISA.
bool hasEightFccRegisters() const { return hasMips4() || hasMips32(); }
- bool isGP64bit() const { return STI.getFeatureBits()[Mips::FeatureGP64Bit]; }
- bool isFP64bit() const { return STI.getFeatureBits()[Mips::FeatureFP64Bit]; }
+ bool isGP64bit() const { return STI.getFeatureBits() & Mips::FeatureGP64Bit; }
+ bool isFP64bit() const { return STI.getFeatureBits() & Mips::FeatureFP64Bit; }
const MipsABIInfo &getABI() const { return ABI; }
bool isABI_N32() const { return ABI.IsN32(); }
bool isABI_N64() const { return ABI.IsN64(); }
bool isABI_O32() const { return ABI.IsO32(); }
- bool isABI_FPXX() const { return STI.getFeatureBits()[Mips::FeatureFPXX]; }
+ bool isABI_FPXX() const { return STI.getFeatureBits() & Mips::FeatureFPXX; }
bool useOddSPReg() const {
- return !(STI.getFeatureBits()[Mips::FeatureNoOddSPReg]);
+ return !(STI.getFeatureBits() & Mips::FeatureNoOddSPReg);
}
bool inMicroMipsMode() const {
- return STI.getFeatureBits()[Mips::FeatureMicroMips];
+ return STI.getFeatureBits() & Mips::FeatureMicroMips;
}
- bool hasMips1() const { return STI.getFeatureBits()[Mips::FeatureMips1]; }
- bool hasMips2() const { return STI.getFeatureBits()[Mips::FeatureMips2]; }
- bool hasMips3() const { return STI.getFeatureBits()[Mips::FeatureMips3]; }
- bool hasMips4() const { return STI.getFeatureBits()[Mips::FeatureMips4]; }
- bool hasMips5() const { return STI.getFeatureBits()[Mips::FeatureMips5]; }
+ bool hasMips1() const { return STI.getFeatureBits() & Mips::FeatureMips1; }
+ bool hasMips2() const { return STI.getFeatureBits() & Mips::FeatureMips2; }
+ bool hasMips3() const { return STI.getFeatureBits() & Mips::FeatureMips3; }
+ bool hasMips4() const { return STI.getFeatureBits() & Mips::FeatureMips4; }
+ bool hasMips5() const { return STI.getFeatureBits() & Mips::FeatureMips5; }
bool hasMips32() const {
- return STI.getFeatureBits()[Mips::FeatureMips32];
+ return (STI.getFeatureBits() & Mips::FeatureMips32);
}
bool hasMips64() const {
- return STI.getFeatureBits()[Mips::FeatureMips64];
+ return (STI.getFeatureBits() & Mips::FeatureMips64);
}
bool hasMips32r2() const {
- return STI.getFeatureBits()[Mips::FeatureMips32r2];
+ return (STI.getFeatureBits() & Mips::FeatureMips32r2);
}
bool hasMips64r2() const {
- return STI.getFeatureBits()[Mips::FeatureMips64r2];
+ return (STI.getFeatureBits() & Mips::FeatureMips64r2);
}
bool hasMips32r3() const {
- return (STI.getFeatureBits()[Mips::FeatureMips32r3]);
+ return (STI.getFeatureBits() & Mips::FeatureMips32r3);
}
bool hasMips64r3() const {
- return (STI.getFeatureBits()[Mips::FeatureMips64r3]);
+ return (STI.getFeatureBits() & Mips::FeatureMips64r3);
}
bool hasMips32r5() const {
- return (STI.getFeatureBits()[Mips::FeatureMips32r5]);
+ return (STI.getFeatureBits() & Mips::FeatureMips32r5);
}
bool hasMips64r5() const {
- return (STI.getFeatureBits()[Mips::FeatureMips64r5]);
+ return (STI.getFeatureBits() & Mips::FeatureMips64r5);
}
bool hasMips32r6() const {
- return STI.getFeatureBits()[Mips::FeatureMips32r6];
+ return (STI.getFeatureBits() & Mips::FeatureMips32r6);
}
bool hasMips64r6() const {
- return STI.getFeatureBits()[Mips::FeatureMips64r6];
+ return (STI.getFeatureBits() & Mips::FeatureMips64r6);
}
-
- bool hasDSP() const { return STI.getFeatureBits()[Mips::FeatureDSP]; }
- bool hasDSPR2() const { return STI.getFeatureBits()[Mips::FeatureDSPR2]; }
- bool hasMSA() const { return STI.getFeatureBits()[Mips::FeatureMSA]; }
bool hasCnMips() const {
- return (STI.getFeatureBits()[Mips::FeatureCnMips]);
+ return (STI.getFeatureBits() & Mips::FeatureCnMips);
}
+ bool hasDSP() const { return (STI.getFeatureBits() & Mips::FeatureDSP); }
+ bool hasDSPR2() const { return (STI.getFeatureBits() & Mips::FeatureDSPR2); }
+ bool hasMSA() const { return (STI.getFeatureBits() & Mips::FeatureMSA); }
bool inMips16Mode() const {
- return STI.getFeatureBits()[Mips::FeatureMips16];
+ return STI.getFeatureBits() & Mips::FeatureMips16;
}
// TODO: see how can we get this info.
bool abiUsesSoftFloat() const { return false; }
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index c69a60b..8849366 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -36,16 +36,16 @@
public:
MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool IsBigEndian)
: MCDisassembler(STI, Ctx),
- IsMicroMips(STI.getFeatureBits()[Mips::FeatureMicroMips]),
+ IsMicroMips(STI.getFeatureBits() & Mips::FeatureMicroMips),
IsBigEndian(IsBigEndian) {}
- bool hasMips3() const { return STI.getFeatureBits()[Mips::FeatureMips3]; }
- bool hasMips32() const { return STI.getFeatureBits()[Mips::FeatureMips32]; }
+ bool hasMips3() const { return STI.getFeatureBits() & Mips::FeatureMips3; }
+ bool hasMips32() const { return STI.getFeatureBits() & Mips::FeatureMips32; }
bool hasMips32r6() const {
- return STI.getFeatureBits()[Mips::FeatureMips32r6];
+ return STI.getFeatureBits() & Mips::FeatureMips32r6;
}
- bool isGP64() const { return STI.getFeatureBits()[Mips::FeatureGP64Bit]; }
+ bool isGP64() const { return STI.getFeatureBits() & Mips::FeatureGP64Bit; }
bool hasCOP3() const {
// Only present in MIPS-I and MIPS-II
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
index ad13065..8208725 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -114,7 +114,7 @@
}
bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const {
- return STI.getFeatureBits()[Mips::FeatureMicroMips];
+ return STI.getFeatureBits() & Mips::FeatureMicroMips;
}
void MipsMCCodeEmitter::EmitByte(unsigned char C, raw_ostream &OS) const {
@@ -177,7 +177,7 @@
(Opcode != Mips::SLL_MM) && !Binary)
llvm_unreachable("unimplemented opcode in EncodeInstruction()");
- if (STI.getFeatureBits()[Mips::FeatureMicroMips]) {
+ if (STI.getFeatureBits() & Mips::FeatureMicroMips) {
int NewOpcode = Mips::Std2MicroMips (Opcode, Mips::Arch_micromips);
if (NewOpcode != -1) {
if (Fixups.size() > N)
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 9804528..64d7cab 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -367,13 +367,12 @@
const MCSubtargetInfo &STI)
: MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
MCAssembler &MCA = getStreamer().getAssembler();
-
Triple T(STI.getTargetTriple());
Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
? true
: false;
- const FeatureBitset &Features = STI.getFeatureBits();
+ uint64_t Features = STI.getFeatureBits();
// Set the header flags that we can in the constructor.
// FIXME: This is a fairly terrible hack. We set the rest
@@ -389,35 +388,35 @@
unsigned EFlags = MCA.getELFHeaderEFlags();
// Architecture
- if (Features[Mips::FeatureMips64r6])
+ if (Features & Mips::FeatureMips64r6)
EFlags |= ELF::EF_MIPS_ARCH_64R6;
- else if (Features[Mips::FeatureMips64r2] ||
- Features[Mips::FeatureMips64r3] ||
- Features[Mips::FeatureMips64r5])
+ else if (Features & Mips::FeatureMips64r2 ||
+ Features & Mips::FeatureMips64r3 ||
+ Features & Mips::FeatureMips64r5)
EFlags |= ELF::EF_MIPS_ARCH_64R2;
- else if (Features[Mips::FeatureMips64])
+ else if (Features & Mips::FeatureMips64)
EFlags |= ELF::EF_MIPS_ARCH_64;
- else if (Features[Mips::FeatureMips5])
+ else if (Features & Mips::FeatureMips5)
EFlags |= ELF::EF_MIPS_ARCH_5;
- else if (Features[Mips::FeatureMips4])
+ else if (Features & Mips::FeatureMips4)
EFlags |= ELF::EF_MIPS_ARCH_4;
- else if (Features[Mips::FeatureMips3])
+ else if (Features & Mips::FeatureMips3)
EFlags |= ELF::EF_MIPS_ARCH_3;
- else if (Features[Mips::FeatureMips32r6])
+ else if (Features & Mips::FeatureMips32r6)
EFlags |= ELF::EF_MIPS_ARCH_32R6;
- else if (Features[Mips::FeatureMips32r2] ||
- Features[Mips::FeatureMips32r3] ||
- Features[Mips::FeatureMips32r5])
+ else if (Features & Mips::FeatureMips32r2 ||
+ Features & Mips::FeatureMips32r3 ||
+ Features & Mips::FeatureMips32r5)
EFlags |= ELF::EF_MIPS_ARCH_32R2;
- else if (Features[Mips::FeatureMips32])
+ else if (Features & Mips::FeatureMips32)
EFlags |= ELF::EF_MIPS_ARCH_32;
- else if (Features[Mips::FeatureMips2])
+ else if (Features & Mips::FeatureMips2)
EFlags |= ELF::EF_MIPS_ARCH_2;
else
EFlags |= ELF::EF_MIPS_ARCH_1;
// Other options.
- if (Features[Mips::FeatureNaN2008])
+ if (Features & Mips::FeatureNaN2008)
EFlags |= ELF::EF_MIPS_NAN2008;
// -mabicalls and -mplt are not implemented but we should act as if they were
@@ -457,7 +456,7 @@
DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
- const FeatureBitset &Features = STI.getFeatureBits();
+ uint64_t Features = STI.getFeatureBits();
// Update e_header flags. See the FIXME and comment above in
// the constructor for a full rundown on this.
@@ -470,10 +469,10 @@
else if (getABI().IsN32())
EFlags |= ELF::EF_MIPS_ABI2;
- if (Features[Mips::FeatureGP64Bit]) {
+ if (Features & Mips::FeatureGP64Bit) {
if (getABI().IsO32())
EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
- } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
+ } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
EFlags |= ELF::EF_MIPS_32BITMODE;
// If we've set the cpic eflag and we're n64, go ahead and set the pic