[IR] Make getParamAttributes take argument numbers, not ArgNo+1
Add hasParamAttribute() and use it instead of hasAttribute(ArgNo+1,
Kind) everywhere.
The fact that the AttributeList index for an argument is ArgNo+1 should
be a hidden implementation detail.
NFC
llvm-svn: 300272
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
index f1fde96..3c99f48 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
@@ -137,9 +137,9 @@
not dereference that pointer argument, even though it may read or write
the memory that the pointer points to if accessed through other pointers.
*/
- if (F->getAttributes().hasAttribute(ArgNo + 1, Attribute::NoAlias) &&
- (F->getAttributes().hasAttribute(ArgNo + 1, Attribute::ReadNone) ||
- F->getAttributes().hasAttribute(ArgNo + 1, Attribute::ReadOnly))) {
+ if (F->hasParamAttribute(ArgNo, Attribute::NoAlias) &&
+ (F->hasParamAttribute(ArgNo, Attribute::ReadNone) ||
+ F->hasParamAttribute(ArgNo, Attribute::ReadOnly))) {
return true;
}
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index f6d3374..01ac996 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -430,8 +430,8 @@
return true;
// For non-compute shaders, SGPR inputs are marked with either inreg or byval.
- if (F->getAttributes().hasAttribute(A->getArgNo() + 1, Attribute::InReg) ||
- F->getAttributes().hasAttribute(A->getArgNo() + 1, Attribute::ByVal))
+ if (F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) ||
+ F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::ByVal))
return true;
// Everything else is in VGPRs.
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
index 307ca6b..21e25de 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
@@ -1550,7 +1550,7 @@
}
}
- if (!PAL.hasAttribute(paramIndex + 1, Attribute::ByVal)) {
+ if (!PAL.hasParamAttribute(paramIndex, Attribute::ByVal)) {
if (Ty->isAggregateType() || Ty->isVectorTy()) {
// Just print .param .align <a> .b8 .param[size];
// <a> = PAL.getparamalignment
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index 36e4382..4d06912 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -2395,7 +2395,7 @@
// to newly created nodes. The SDNodes for params have to
// appear in the same order as their order of appearance
// in the original function. "idx+1" holds that order.
- if (!PAL.hasAttribute(i + 1, Attribute::ByVal)) {
+ if (!PAL.hasParamAttribute(i, Attribute::ByVal)) {
bool aggregateIsPacked = false;
if (StructType *STy = dyn_cast<StructType>(Ty))
aggregateIsPacked = STy->isPacked();
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
index e7fd4ef..53698ff 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -597,11 +597,11 @@
unsigned i = 0;
for (auto const &Arg : F->args()) {
const AttributeList &Attrs = F->getAttributes();
- if (Attrs.hasAttribute(i+1, Attribute::ByVal) ||
- Attrs.hasAttribute(i+1, Attribute::SwiftSelf) ||
- Attrs.hasAttribute(i+1, Attribute::SwiftError) ||
- Attrs.hasAttribute(i+1, Attribute::InAlloca) ||
- Attrs.hasAttribute(i+1, Attribute::Nest))
+ if (Attrs.hasParamAttribute(i, Attribute::ByVal) ||
+ Attrs.hasParamAttribute(i, Attribute::SwiftSelf) ||
+ Attrs.hasParamAttribute(i, Attribute::SwiftError) ||
+ Attrs.hasParamAttribute(i, Attribute::InAlloca) ||
+ Attrs.hasParamAttribute(i, Attribute::Nest))
return false;
Type *ArgTy = Arg.getType();
@@ -747,18 +747,18 @@
return false;
const AttributeList &Attrs = Call->getAttributes();
- if (Attrs.hasAttribute(i+1, Attribute::ByVal) ||
- Attrs.hasAttribute(i+1, Attribute::SwiftSelf) ||
- Attrs.hasAttribute(i+1, Attribute::SwiftError) ||
- Attrs.hasAttribute(i+1, Attribute::InAlloca) ||
- Attrs.hasAttribute(i+1, Attribute::Nest))
+ if (Attrs.hasParamAttribute(i, Attribute::ByVal) ||
+ Attrs.hasParamAttribute(i, Attribute::SwiftSelf) ||
+ Attrs.hasParamAttribute(i, Attribute::SwiftError) ||
+ Attrs.hasParamAttribute(i, Attribute::InAlloca) ||
+ Attrs.hasParamAttribute(i, Attribute::Nest))
return false;
unsigned Reg;
- if (Attrs.hasAttribute(i+1, Attribute::SExt))
+ if (Attrs.hasParamAttribute(i, Attribute::SExt))
Reg = getRegForSignedValue(V);
- else if (Attrs.hasAttribute(i+1, Attribute::ZExt))
+ else if (Attrs.hasParamAttribute(i, Attribute::ZExt))
Reg = getRegForUnsignedValue(V);
else
Reg = getRegForValue(V);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
index 6af7d10..947c032 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
@@ -441,9 +441,8 @@
// No attributes for the callee pointer.
ArgAttributes.push_back(AttributeSet());
// Copy the argument attributes from the original
- for (unsigned i = 1, e = CI->getNumArgOperands(); i <= e; ++i) {
+ for (unsigned i = 0, e = CI->getNumArgOperands(); i < e; ++i)
ArgAttributes.push_back(InvokeAL.getParamAttributes(i));
- }
// Reconstruct the AttributesList based on the vector we constructed.
AttributeList NewCallAL =