commit f0b34a5c571ac3b748cc270b86ef59ad59b267bd
author Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Jul 29 21:49:42 2016 +0000
committer Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Jul 29 21:49:42 2016 +0000
tree 2be1eaf96f77729d03bd988070bf6489e0177c6d
parent f396b4c40dad7df67f7cadc6aaa7ac3dbf42f866

[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC

llvm-svn: 277220

llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp

diff --git a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
index 38706ef..8fcd782 100644
--- a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
@@ -42,7 +42,7 @@
   if (!Resources->canReserveResources(*MI)) {
     DEBUG(dbgs() << "*** Hazard in cycle " << PacketNum << ", " << *MI);
     HazardType RetVal = Hazard;
-    if (TII->mayBeNewStore(MI)) {
+    if (TII->mayBeNewStore(*MI)) {
       // Make sure the register to be stored is defined by an instruction in the
       // packet.
       MachineOperand &MO = MI->getOperand(MI->getNumOperands() - 1);
@@ -52,7 +52,7 @@
       // causes a hazard.
       MachineFunction *MF = MI->getParent()->getParent();
       MachineInstr *NewMI =
-        MF->CreateMachineInstr(TII->get(TII->getDotNewOp(MI)),
+        MF->CreateMachineInstr(TII->get(TII->getDotNewOp(*MI)),
                                MI->getDebugLoc());
       if (Resources->canReserveResources(*NewMI))
         RetVal = NoHazard;
@@ -106,10 +106,11 @@
   if (!Resources->canReserveResources(*MI)) {
     // It must be a .new store since other instructions must be able to be
     // reserved at this point.
-    assert(TII->mayBeNewStore(MI) && "Expecting .new store");
+    assert(TII->mayBeNewStore(*MI) && "Expecting .new store");
     MachineFunction *MF = MI->getParent()->getParent();
-    MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(TII->getDotNewOp(MI)),
-                                                 MI->getDebugLoc());
+    MachineInstr *NewMI =
+        MF->CreateMachineInstr(TII->get(TII->getDotNewOp(*MI)),
+                               MI->getDebugLoc());
     assert(Resources->canReserveResources(*NewMI));
     Resources->reserveResources(*NewMI);
     MF->DeleteMachineInstr(NewMI);
@@ -123,7 +124,7 @@
   // schedule it before other instructions. We only do this if the use has
   // the same height as the dot cur. Otherwise, we may miss scheduling an
   // instruction with a greater height, which is more important.
-  if (TII->mayBeCurLoad(MI))
+  if (TII->mayBeCurLoad(*MI))
     for (auto &S : SU->Succs)
       if (S.isAssignedRegDep() && S.getLatency() == 0 &&
           SU->getHeight() == S.getSUnit()->getHeight()) {