commit f1ef87ddbbc1a62111adcc7ef31f4a28892ebcb9
author Richard Barton <richard.barton@arm.com> Wed Jun 06 09:12:53 2012 +0000
committer Richard Barton <richard.barton@arm.com> Wed Jun 06 09:12:53 2012 +0000
tree 6b8e1ea3506724f4881147fe2c613f7d18cdafd0
parent 0baec549a3f49d8c04a0092917f758cc89ef238d

Correct decoder for T1 conditional B encoding

llvm-svn: 158055

llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index fd602aa..66ea117 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -3463,9 +3463,9 @@
 static DecodeStatus
 DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,
                             uint64_t Address, const void *Decoder){
-  if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<8>(Val<<1) + 4,
+  if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<9>(Val<<1) + 4,
                                 true, 2, Inst, Decoder))
-    Inst.addOperand(MCOperand::CreateImm(SignExtend32<8>(Val << 1)));
+    Inst.addOperand(MCOperand::CreateImm(SignExtend32<9>(Val << 1)));
   return MCDisassembler::Success;
 }