Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
Changes:
There was a condition for `!NeedsFrameRecord` missing in the assert. The
assert in question has changed to:
+ assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg2 != AArch64::FP ||
+ RPI.Reg1 == AArch64::LR) &&
+ "FrameRecord must be allocated together with LR");
This addresses PR43016.
llvm-svn: 369122
diff --git a/llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll b/llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
index 09eb5fe..d980bc0 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
@@ -99,18 +99,18 @@
; CHECK: .cfi_startproc
; Check that used callee-saved registers are saved
; CHECK: sub sp, sp, #32
-; CHECK: stp x19, x30, [sp, #16]
+; CHECK: stp x30, x19, [sp, #16]
; Check correctness of cfi pseudo-instructions
; CHECK: .cfi_def_cfa_offset 32
-; CHECK: .cfi_offset w30, -8
-; CHECK: .cfi_offset w19, -16
+; CHECK: .cfi_offset w19, -8
+; CHECK: .cfi_offset w30, -16
; Check correct access to arguments passed on the stack, through stack pointer
; CHECK: ldr d[[DARG:[0-9]+]], [sp, #56]
; CHECK: ldr w[[IARG:[0-9]+]], [sp, #40]
; Check correct access to local variable on the stack, through stack pointer
; CHECK: ldr w[[ILOC:[0-9]+]], [sp, #12]
; Check epilogue:
-; CHECK: ldp x19, x30, [sp, #16]
+; CHECK: ldp x30, x19, [sp, #16]
; CHECK: ret
; CHECK: .cfi_endproc
@@ -180,28 +180,28 @@
; CHECK-LABEL: novla_dynamicrealign_call
; CHECK: .cfi_startproc
; Check that used callee-saved registers are saved
-; CHECK: str x19, [sp, #-32]!
+; CHECK: stp x29, x30, [sp, #-32]!
; Check that the frame pointer is created:
-; CHECK: stp x29, x30, [sp, #16]
-; CHECK: add x29, sp, #16
+; CHECK: str x19, [sp, #16]
+; CHECK: mov x29, sp
; Check the dynamic realignment of the stack pointer to a 128-byte boundary
; CHECK: sub x9, sp, #96
; CHECK: and sp, x9, #0xffffffffffffff80
; Check correctness of cfi pseudo-instructions
-; CHECK: .cfi_def_cfa w29, 16
-; CHECK: .cfi_offset w30, -8
-; CHECK: .cfi_offset w29, -16
-; CHECK: .cfi_offset w19, -32
+; CHECK: .cfi_def_cfa w29, 32
+; CHECK: .cfi_offset w19, -16
+; CHECK: .cfi_offset w30, -24
+; CHECK: .cfi_offset w29, -32
; Check correct access to arguments passed on the stack, through frame pointer
-; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
-; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
+; CHECK: ldr d[[DARG:[0-9]+]], [x29, #56]
+; CHECK: ldr w[[IARG:[0-9]+]], [x29, #40]
; Check correct access to local variable on the stack, through re-aligned stack pointer
; CHECK: ldr w[[ILOC:[0-9]+]], [sp]
; Check epilogue:
; Check that stack pointer get restored from frame pointer.
-; CHECK: sub sp, x29, #16 // =16
-; CHECK: ldp x29, x30, [sp, #16]
-; CHECK: ldr x19, [sp], #32
+; CHECK: mov sp, x29
+; CHECK: ldr x19, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #32
; CHECK: ret
; CHECK: .cfi_endproc
@@ -284,22 +284,22 @@
; CHECK-LABEL: vla_nodynamicrealign_call
; CHECK: .cfi_startproc
; Check that used callee-saved registers are saved
-; CHECK: stp x20, x19, [sp, #-32]!
+; CHECK: stp x29, x30, [sp, #-32]!
; Check that the frame pointer is created:
-; CHECK: stp x29, x30, [sp, #16]
-; CHECK: add x29, sp, #16
+; CHECK: stp x20, x19, [sp, #16]
+; CHECK: mov x29, sp
; Check that space is reserved on the stack for the local variable,
; rounded up to a multiple of 16 to keep the stack pointer 16-byte aligned.
; CHECK: sub sp, sp, #16
; Check correctness of cfi pseudo-instructions
-; CHECK: .cfi_def_cfa w29, 16
-; CHECK: .cfi_offset w30, -8
-; CHECK: .cfi_offset w29, -16
-; CHECK: .cfi_offset w19, -24
-; CHECK: .cfi_offset w20, -32
+; CHECK: .cfi_def_cfa w29, 32
+; CHECK: .cfi_offset w19, -8
+; CHECK: .cfi_offset w20, -16
+; CHECK: .cfi_offset w30, -24
+; CHECK: .cfi_offset w29, -32
; Check correct access to arguments passed on the stack, through frame pointer
-; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
-; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
+; CHECK: ldr w[[IARG:[0-9]+]], [x29, #40]
+; CHECK: ldr d[[DARG:[0-9]+]], [x29, #56]
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
; CHECK: mov w9, w0
; CHECK: mov x10, sp
@@ -309,14 +309,14 @@
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9
; CHECK: mov sp, x[[VLASPTMP]]
; Check correct access to local variable, through frame pointer
-; CHECK: ldur w[[ILOC:[0-9]+]], [x29, #-20]
+; CHECK: ldur w[[ILOC:[0-9]+]], [x29, #-4]
; Check correct accessing of the VLA variable through the base pointer
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
; Check epilogue:
; Check that stack pointer get restored from frame pointer.
-; CHECK: sub sp, x29, #16 // =16
-; CHECK: ldp x29, x30, [sp, #16]
-; CHECK: ldp x20, x19, [sp], #32
+; CHECK: mov sp, x29
+; CHECK: ldp x20, x19, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #32
; CHECK: ret
; CHECK: .cfi_endproc
@@ -385,11 +385,11 @@
; CHECK-LABEL: vla_dynamicrealign_call
; CHECK: .cfi_startproc
; Check that used callee-saved registers are saved
-; CHECK: str x21, [sp, #-48]!
-; CHECK: stp x20, x19, [sp, #16]
+; CHECK: stp x29, x30, [sp, #-48]!
+; CHECK: str x21, [sp, #16]
+; CHECK: stp x20, x19, [sp, #32]
; Check that the frame pointer is created:
-; CHECK: stp x29, x30, [sp, #32]
-; CHECK: add x29, sp, #32
+; CHECK: mov x29, sp
; Check that the stack pointer gets re-aligned to 128
; bytes & the base pointer (x19) gets initialized to
; this 128-byte aligned area for local variables &
@@ -398,15 +398,15 @@
; CHECK: and sp, x9, #0xffffffffffffff80
; CHECK: mov x19, sp
; Check correctness of cfi pseudo-instructions
-; CHECK: .cfi_def_cfa w29, 16
-; CHECK: .cfi_offset w30, -8
-; CHECK: .cfi_offset w29, -16
-; CHECK: .cfi_offset w19, -24
-; CHECK: .cfi_offset w20, -32
-; CHECK: .cfi_offset w21, -48
+; CHECK: .cfi_def_cfa w29, 48
+; CHECK: .cfi_offset w19, -8
+; CHECK: .cfi_offset w20, -16
+; CHECK: .cfi_offset w21, -32
+; CHECK: .cfi_offset w30, -40
+; CHECK: .cfi_offset w29, -48
; Check correct access to arguments passed on the stack, through frame pointer
-; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
-; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
+; CHECK: ldr w[[IARG:[0-9]+]], [x29, #56]
+; CHECK: ldr d[[DARG:[0-9]+]], [x29, #72]
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
; and set-up of base pointer (x19).
; CHECK: mov w9, w0
@@ -421,10 +421,10 @@
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
; Check epilogue:
; Check that stack pointer get restored from frame pointer.
-; CHECK: sub sp, x29, #32
-; CHECK: ldp x29, x30, [sp, #32]
-; CHECK: ldp x20, x19, [sp, #16]
-; CHECK: ldr x21, [sp], #48
+; CHECK: mov sp, x29
+; CHECK: ldp x20, x19, [sp, #32]
+; CHECK: ldr x21, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #48
; CHECK: ret
; CHECK: .cfi_endproc
@@ -493,10 +493,10 @@
; CHECK-LABEL: vla_dynamicrealign_nocall
; Check that used callee-saved registers are saved
-; CHECK: str x19, [sp, #-32]!
+; CHECK: stp x29, x30, [sp, #-32]!
+; CHECK: str x19, [sp, #16]
; Check that the frame pointer is created:
-; CHECK: stp x29, x30, [sp, #16]
-; CHECK: add x29, sp, #16
+; CHECK: mov x29, sp
; Check that the stack pointer gets re-aligned to 128
; bytes & the base pointer (x19) gets initialized to
; this 128-byte aligned area for local variables &
@@ -505,8 +505,8 @@
; CHECK: and sp, x9, #0xffffffffffffff80
; CHECK: mov x19, sp
; Check correct access to arguments passed on the stack, through frame pointer
-; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
-; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
+; CHECK: ldr w[[IARG:[0-9]+]], [x29, #40]
+; CHECK: ldr d[[DARG:[0-9]+]], [x29, #56]
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
; and set-up of base pointer (x19).
; CHECK: mov w9, w0
@@ -521,9 +521,9 @@
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
; Check epilogue:
; Check that stack pointer get restored from frame pointer.
-; CHECK: sub sp, x29, #16
-; CHECK: ldp x29, x30, [sp, #16]
-; CHECK: ldr x19, [sp], #32
+; CHECK: mov sp, x29
+; CHECK: ldr x19, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #32
; CHECK: ret
; CHECK-MACHO-LABEL: _vla_dynamicrealign_nocall:
@@ -579,10 +579,10 @@
; CHECK-LABEL: vla_dynamicrealign_nocall_large_align
; Check that used callee-saved registers are saved
-; CHECK: stp x28, x19, [sp, #-32]!
+; CHECK: stp x29, x30, [sp, #-32]!
+; CHECK: str x19, [sp, #16]
; Check that the frame pointer is created:
-; CHECK: stp x29, x30, [sp, #16]
-; CHECK: add x29, sp, #16
+; CHECK: mov x29, sp
; Check that the stack pointer gets re-aligned to 128
; bytes & the base pointer (x19) gets initialized to
; this 128-byte aligned area for local variables &
@@ -591,8 +591,8 @@
; CHECK: and sp, x9, #0xffffffffffff8000
; CHECK: mov x19, sp
; Check correct access to arguments passed on the stack, through frame pointer
-; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
-; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
+; CHECK: ldr w[[IARG:[0-9]+]], [x29, #40]
+; CHECK: ldr d[[DARG:[0-9]+]], [x29, #56]
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
; and set-up of base pointer (x19).
; CHECK: mov w9, w0
@@ -607,9 +607,9 @@
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
; Check epilogue:
; Check that stack pointer get restored from frame pointer.
-; CHECK: sub sp, x29, #16
-; CHECK: ldp x29, x30, [sp, #16]
-; CHECK: ldp x28, x19, [sp], #32
+; CHECK: mov sp, x29
+; CHECK: ldr x19, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #32
; CHECK: ret
; CHECK-MACHO-LABEL: _vla_dynamicrealign_nocall_large_align:
diff --git a/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
index 276a726..a29e9e5 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
+++ b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
@@ -176,12 +176,12 @@
; CHECK-NEXT: frame-setup STPQi killed $q13, killed $q12, $sp, 11
; CHECK-NEXT: frame-setup STPQi killed $q11, killed $q10, $sp, 13
; CHECK-NEXT: frame-setup STPQi killed $q9, killed $q8, $sp, 15
- ; CHECK-NEXT: frame-setup STPXi killed $x28, killed $x27, $sp, 34 :: (store 8 into %stack.{{[0-9]+}}), (store 8 into %stack.{{[0-9]+}})
- ; CHECK-NEXT: frame-setup STPXi killed $x26, killed $x25, $sp, 36
- ; CHECK-NEXT: frame-setup STPXi killed $x24, killed $x23, $sp, 38
- ; CHECK-NEXT: frame-setup STPXi killed $x22, killed $x21, $sp, 40
- ; CHECK-NEXT: frame-setup STPXi killed $x20, killed $x19, $sp, 42
- ; CHECK-NEXT: frame-setup STPXi killed $fp, killed $lr, $sp, 44
+ ; CHECK-NEXT: frame-setup STPXi killed $fp, killed $lr, $sp, 34 :: (store 8 into %stack.{{[0-9]+}}), (store 8 into %stack.{{[0-9]+}})
+ ; CHECK-NEXT: frame-setup STPXi killed $x28, killed $x27, $sp, 36
+ ; CHECK-NEXT: frame-setup STPXi killed $x26, killed $x25, $sp, 38
+ ; CHECK-NEXT: frame-setup STPXi killed $x24, killed $x23, $sp, 40
+ ; CHECK-NEXT: frame-setup STPXi killed $x22, killed $x21, $sp, 42
+ ; CHECK-NEXT: frame-setup STPXi killed $x20, killed $x19, $sp, 44
...
---
@@ -242,12 +242,12 @@
; CHECK-NEXT: frame-setup STPQi killed $q13, killed $q12, $sp, 10
; CHECK-NEXT: frame-setup STPQi killed $q11, killed $q10, $sp, 12
; CHECK-NEXT: frame-setup STPQi killed $q9, killed $q8, $sp, 14
- ; CHECK-NEXT: frame-setup STPXi killed $x28, killed $x27, $sp, 32 :: (store 8 into %stack.{{[0-9]+}}), (store 8 into %stack.{{[0-9]+}})
- ; CHECK-NEXT: frame-setup STPXi killed $x26, killed $x25, $sp, 34
- ; CHECK-NEXT: frame-setup STPXi killed $x24, killed $x23, $sp, 36
- ; CHECK-NEXT: frame-setup STPXi killed $x22, killed $x21, $sp, 38
- ; CHECK-NEXT: frame-setup STPXi killed $x20, killed $x19, $sp, 40
- ; CHECK-NEXT: frame-setup STPXi killed $fp, killed $lr, $sp, 42
+ ; CHECK-NEXT: frame-setup STPXi killed $fp, killed $lr, $sp, 32 :: (store 8 into %stack.{{[0-9]+}}), (store 8 into %stack.{{[0-9]+}})
+ ; CHECK-NEXT: frame-setup STPXi killed $x28, killed $x27, $sp, 34
+ ; CHECK-NEXT: frame-setup STPXi killed $x26, killed $x25, $sp, 36
+ ; CHECK-NEXT: frame-setup STPXi killed $x24, killed $x23, $sp, 38
+ ; CHECK-NEXT: frame-setup STPXi killed $x22, killed $x21, $sp, 40
+ ; CHECK-NEXT: frame-setup STPXi killed $x20, killed $x19, $sp, 42
; CHECK-NEXT: $sp = frame-setup SUBXri $sp, 176, 0
...
diff --git a/llvm/test/CodeGen/AArch64/addsub-constant-folding.ll b/llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
index bb3b2eb..43c98e8 100644
--- a/llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
+++ b/llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
@@ -19,15 +19,15 @@
define i32 @add_const_add_const_extrause(i32 %arg) {
; CHECK-LABEL: add_const_add_const_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: add w0, w0, #8 // =8
; CHECK-NEXT: bl use
; CHECK-NEXT: add w0, w19, #10 // =10
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = add i32 %arg, 8
call void @use(i32 %t0)
@@ -96,15 +96,15 @@
define i32 @add_const_sub_const_extrause(i32 %arg) {
; CHECK-LABEL: add_const_sub_const_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: add w0, w0, #8 // =8
; CHECK-NEXT: bl use
; CHECK-NEXT: add w0, w19, #6 // =6
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = add i32 %arg, 8
call void @use(i32 %t0)
@@ -174,16 +174,16 @@
define i32 @add_const_const_sub_extrause(i32 %arg) {
; CHECK-LABEL: add_const_const_sub_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: add w0, w0, #8 // =8
; CHECK-NEXT: bl use
; CHECK-NEXT: mov w8, #-6
; CHECK-NEXT: sub w0, w8, w19
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = add i32 %arg, 8
call void @use(i32 %t0)
@@ -252,15 +252,15 @@
define i32 @sub_const_add_const_extrause(i32 %arg) {
; CHECK-LABEL: sub_const_add_const_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: sub w0, w0, #8 // =8
; CHECK-NEXT: bl use
; CHECK-NEXT: sub w0, w19, #6 // =6
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = sub i32 %arg, 8
call void @use(i32 %t0)
@@ -329,15 +329,15 @@
define i32 @sub_const_sub_const_extrause(i32 %arg) {
; CHECK-LABEL: sub_const_sub_const_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: sub w0, w0, #8 // =8
; CHECK-NEXT: bl use
; CHECK-NEXT: sub w0, w19, #10 // =10
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = sub i32 %arg, 8
call void @use(i32 %t0)
@@ -407,16 +407,16 @@
define i32 @sub_const_const_sub_extrause(i32 %arg) {
; CHECK-LABEL: sub_const_const_sub_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: sub w0, w0, #8 // =8
; CHECK-NEXT: bl use
; CHECK-NEXT: mov w8, #10
; CHECK-NEXT: sub w0, w8, w19
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = sub i32 %arg, 8
call void @use(i32 %t0)
@@ -486,17 +486,17 @@
define i32 @const_sub_add_const_extrause(i32 %arg) {
; CHECK-LABEL: const_sub_add_const_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w8, #8
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: sub w0, w8, w0
; CHECK-NEXT: bl use
; CHECK-NEXT: mov w8, #10
; CHECK-NEXT: sub w0, w8, w19
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = sub i32 8, %arg
call void @use(i32 %t0)
@@ -566,17 +566,17 @@
define i32 @const_sub_sub_const_extrause(i32 %arg) {
; CHECK-LABEL: const_sub_sub_const_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w8, #8
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: sub w0, w8, w0
; CHECK-NEXT: bl use
; CHECK-NEXT: mov w8, #6
; CHECK-NEXT: sub w0, w8, w19
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = sub i32 8, %arg
call void @use(i32 %t0)
@@ -645,17 +645,17 @@
define i32 @const_sub_const_sub_extrause(i32 %arg) {
; CHECK-LABEL: const_sub_const_sub_extrause:
; CHECK: // %bb.0:
-; CHECK-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -8
-; CHECK-NEXT: .cfi_offset w19, -16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w8, #8
; CHECK-NEXT: sub w19, w8, w0
; CHECK-NEXT: mov w0, w19
; CHECK-NEXT: bl use
; CHECK-NEXT: mov w8, #2
; CHECK-NEXT: sub w0, w8, w19
-; CHECK-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%t0 = sub i32 8, %arg
call void @use(i32 %t0)
diff --git a/llvm/test/CodeGen/AArch64/alloca.ll b/llvm/test/CodeGen/AArch64/alloca.ll
index 25bb3c8..e7906a1 100644
--- a/llvm/test/CodeGen/AArch64/alloca.ll
+++ b/llvm/test/CodeGen/AArch64/alloca.ll
@@ -117,9 +117,9 @@
; CHECK-MACHO-LABEL: test_alloca_large_frame:
-; CHECK: stp x28, x19, [sp, #-32]!
-; CHECK: stp x29, x30, [sp, #16]
-; CHECK: add x29, sp, #16
+; CHECK: stp x29, x30, [sp, #-32]!
+; CHECK: stp x28, x19, [sp, #16]
+; CHECK: mov x29, sp
; CHECK: sub sp, sp, #1953, lsl #12
; CHECK: sub sp, sp, #512
@@ -136,9 +136,9 @@
ret void
-; CHECK: sub sp, x29, #16
-; CHECK: ldp x29, x30, [sp, #16]
-; CHECK: ldp x28, x19, [sp], #32
+; CHECK: mov sp, x29
+; CHECK: ldp x28, x19, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #32
; CHECK-MACHO: sub sp, x29, #16
; CHECK-MACHO: ldp x29, x30, [sp, #16]
@@ -152,6 +152,7 @@
; CHECK-LABEL: test_scoped_alloca:
%sp = call i8* @llvm.stacksave()
+; CHECK: mov x29, sp
; CHECK: mov [[SAVED_SP:x[0-9]+]], sp
; CHECK: mov [[OLDSP:x[0-9]+]], sp
diff --git a/llvm/test/CodeGen/AArch64/arm64-alloca-frame-pointer-offset.ll b/llvm/test/CodeGen/AArch64/arm64-alloca-frame-pointer-offset.ll
index 45e32c8..0267acd 100644
--- a/llvm/test/CodeGen/AArch64/arm64-alloca-frame-pointer-offset.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-alloca-frame-pointer-offset.ll
@@ -1,8 +1,8 @@
; RUN: llc -mtriple=arm64-eabi -mcpu=cyclone < %s | FileCheck %s
; CHECK: foo
-; CHECK-DAG: stur w[[REG0:[0-9]+]], [x29, #-24]
-; CHECK-DAG: stur w[[REG0]], [x29, #-20]
+; CHECK-DAG: str w[[REG0:[0-9]+]], [x29, #24]
+; CHECK-DAG: str w[[REG0]], [x29, #28]
define i32 @foo(i32 %a) nounwind {
%retval = alloca i32, align 4
%a.addr = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/cgp-usubo.ll b/llvm/test/CodeGen/AArch64/cgp-usubo.ll
index 58821c3..4dfd427 100644
--- a/llvm/test/CodeGen/AArch64/cgp-usubo.ll
+++ b/llvm/test/CodeGen/AArch64/cgp-usubo.ll
@@ -151,10 +151,10 @@
define i1 @usubo_ult_cmp_dominates_i64(i64 %x, i64 %y, i64* %p, i1 %cond) nounwind {
; CHECK-LABEL: usubo_ult_cmp_dominates_i64:
; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: str x22, [sp, #-48]! // 8-byte Folded Spill
-; CHECK-NEXT: stp x21, x20, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT: mov w20, w3
-; CHECK-NEXT: stp x19, x30, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: tbz w3, #0, .LBB8_3
; CHECK-NEXT: // %bb.1: // %t
; CHECK-NEXT: cmp x0, x1
@@ -172,9 +172,9 @@
; CHECK-NEXT: .LBB8_3: // %f
; CHECK-NEXT: and w0, w20, #0x1
; CHECK-NEXT: .LBB8_4: // %f
-; CHECK-NEXT: ldp x19, x30, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT: ldp x21, x20, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x22, [sp], #48 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
br i1 %cond, label %t, label %f
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll b/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
index a17a256..62815da 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
@@ -13,6 +13,7 @@
; CHECK-ERRORS: LLVM ERROR: FastISel missed call
; CHECK-LABEL: foo:
+; CHECK: sub
; CHECK-DAG: mov x[[SP:[0-9]+]], sp
; CHECK-DAG: mov [[TMP:w[0-9]+]], #4104
; CHECK: mov w[[OFFSET:[0-9]+]], [[TMP]]
diff --git a/llvm/test/CodeGen/AArch64/irg_sp_tagp.ll b/llvm/test/CodeGen/AArch64/irg_sp_tagp.ll
index 1232090..4af79ac 100644
--- a/llvm/test/CodeGen/AArch64/irg_sp_tagp.ll
+++ b/llvm/test/CodeGen/AArch64/irg_sp_tagp.ll
@@ -35,7 +35,7 @@
define void @realign() {
entry:
; CHECK-LABEL: realign:
-; CHECK: add x29, sp, #16
+; CHECK: mov x29, sp
; CHECK: and sp, x{{[0-9]*}}, #0xffffffffffffffc0
; CHECK: irg [[R:x[0-9]+]], sp{{$}}
; CHECK: addg x0, [[R]], #0, #1
diff --git a/llvm/test/CodeGen/AArch64/regress-w29-reserved-with-fp.ll b/llvm/test/CodeGen/AArch64/regress-w29-reserved-with-fp.ll
index 2cbcad6..0d1ce41 100644
--- a/llvm/test/CodeGen/AArch64/regress-w29-reserved-with-fp.ll
+++ b/llvm/test/CodeGen/AArch64/regress-w29-reserved-with-fp.ll
@@ -5,7 +5,7 @@
define void @test_w29_reserved() {
; CHECK-LABEL: test_w29_reserved:
-; CHECK: add x29, sp, #{{[0-9]+}}
+; CHECK: mov x29, sp
%val1 = load volatile i32, i32* @var
%val2 = load volatile i32, i32* @var
diff --git a/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir b/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
index f080d7d..327ce9e 100644
--- a/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
+++ b/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
@@ -97,10 +97,10 @@
B %bb.1
bb.1:
- ; CHECK: $x20, $lr = frame-destroy LDPXi $sp, 2
- ; BEFORELDSTOPT-NEXT: $x21 = frame-destroy LDRXui $sp, 0
+ ; CHECK: $x21, $x20 = frame-destroy LDPXi $sp, 2
+ ; BEFORELDSTOPT-NEXT: $lr = frame-destroy LDRXui $sp, 0
; BEFORELDSTOPT-NEXT: $sp = frame-destroy ADDXri $sp, 32, 0
- ; AFTERLDSTOPT-NEXT: early-clobber $sp, $x21 = frame-destroy LDRXpost $sp, 32
+ ; AFTERLDSTOPT-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 32
RET_ReallyLR
...
diff --git a/llvm/test/CodeGen/AArch64/seh-finally.ll b/llvm/test/CodeGen/AArch64/seh-finally.ll
index b7027fb..66558c9 100644
--- a/llvm/test/CodeGen/AArch64/seh-finally.ll
+++ b/llvm/test/CodeGen/AArch64/seh-finally.ll
@@ -86,7 +86,7 @@
define void @stack_realign() #0 personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) {
entry:
; CHECK-LABEL: stack_realign
-; CHECK: add x29, sp, #16
+; CHECK: mov x29, sp
; CHECK: sub x9, sp, #64
; CHECK: and sp, x9, #0xffffffffffffffe0
; CHECK: mov x19, sp
@@ -205,15 +205,15 @@
define void @vla_and_realign(i32 %n) #0 personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) {
entry:
; CHECK-LABEL: vla_and_realign
-; CHECK: add x29, sp, #16
+; CHECK: mov x29, sp
; CHECK: sub x9, sp, #64
; CHECK: and sp, x9, #0xffffffffffffffe0
; CHECK: mov x19, sp
; CHECK: mov x1, #-2
; CHECK: stur x1, [x19]
; CHECK: .set .Lvla_and_realign$frame_escape_0, 32
-; CHECK: stur w0, [x29, #-4]
-; CHECK: ldur w8, [x29, #-4]
+; CHECK: str w0, [x29, #28]
+; CHECK: ldr w8, [x29, #28]
; CHECK: mov x9, sp
; CHECK: str x9, [x19, #24]
; CHECK: str x8, [x19, #16]
diff --git a/llvm/test/CodeGen/AArch64/shadow-call-stack.ll b/llvm/test/CodeGen/AArch64/shadow-call-stack.ll
index 060d81b..9c6c36f5 100644
--- a/llvm/test/CodeGen/AArch64/shadow-call-stack.ll
+++ b/llvm/test/CodeGen/AArch64/shadow-call-stack.ll
@@ -41,7 +41,7 @@
%res12 = add i32 %res1, %res2
%res34 = add i32 %res3, %res4
%res1234 = add i32 %res12, %res34
- ; CHECK: ldp {{.*}}x30, [sp
+ ; CHECK: ldp x30,{{.*}}, [sp
; CHECK: ldr x30, [x18, #-8]!
; CHECK: ret
ret i32 %res1234
diff --git a/llvm/test/CodeGen/AArch64/sink-copy-for-shrink-wrap.ll b/llvm/test/CodeGen/AArch64/sink-copy-for-shrink-wrap.ll
index 7c4a323..23c7f0b 100644
--- a/llvm/test/CodeGen/AArch64/sink-copy-for-shrink-wrap.ll
+++ b/llvm/test/CodeGen/AArch64/sink-copy-for-shrink-wrap.ll
@@ -4,7 +4,7 @@
; CHECK-NOT: stp
; CHECK-NOT: mov w{{[0-9]+}}, w0
; CHECK-LABEL: %bb.1:
-; CHECK: stp x19
+; CHECK: stp {{.*}}x19
; CHECK: mov w{{[0-9]+}}, w0
define i32 @shrinkwrapme(i32 %paramAcrossCall, i32 %paramNotAcrossCall) {
diff --git a/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir b/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
index b65318a..1b9411d 100644
--- a/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
+++ b/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
@@ -13,7 +13,7 @@
# CHECK: id: 0, name: '', type: default, offset: -64, size: 4, alignment: 64
# CHECK-NEXT: stack-id: default
# CHECK-NEXT: local-offset: -64
-# CHECK: id: 1, name: '', type: default, offset: -20, size: 4, alignment: 4
+# CHECK: id: 1, name: '', type: default, offset: -4, size: 4, alignment: 4
# CHECK-NEXT: stack-id: default
# CHECK-NEXT: local-offset: -68
stack:
@@ -23,7 +23,7 @@
# CHECK: body:
# CHECK: $sp = ANDXri killed ${{x[0-9]+}}, 7865
# CHECK: STRSui $s0, $sp, 0
-# CHECK: STURSi $s0, $fp, -4
+# CHECK: STRSui $s0, $fp, 7
body: |
bb.0.entry:
liveins: $s0
diff --git a/llvm/test/CodeGen/AArch64/sponentry.ll b/llvm/test/CodeGen/AArch64/sponentry.ll
index 7e14cf4..c308eb4 100644
--- a/llvm/test/CodeGen/AArch64/sponentry.ll
+++ b/llvm/test/CodeGen/AArch64/sponentry.ll
@@ -38,8 +38,8 @@
; CHECK: foo:
; CHECK: sub sp, sp, #448
-; CHECK: add x29, sp, #432
-; CHECK: add x1, x29, #16
+; CHECK: add x29, sp, #416
+; CHECK: add x1, x29, #32
; CHECK: bl _setjmpex
; NOFP: sub sp, sp, #432
diff --git a/llvm/test/CodeGen/AArch64/stack-guard-reassign.ll b/llvm/test/CodeGen/AArch64/stack-guard-reassign.ll
index a483840..6b00eda 100644
--- a/llvm/test/CodeGen/AArch64/stack-guard-reassign.ll
+++ b/llvm/test/CodeGen/AArch64/stack-guard-reassign.ll
@@ -5,4 +5,4 @@
; CHECK-LABEL: fn:
; CHECK: adrp x8, __stack_chk_guard
; CHECK-NEXT: ldr x8, [x8, :lo12:__stack_chk_guard]
-; CHECK-NEXT: stur x8, [x29, #-24]
+; CHECK-NEXT: stur x8, [x29, #-8]
diff --git a/llvm/test/CodeGen/AArch64/stack-guard-vaarg.ll b/llvm/test/CodeGen/AArch64/stack-guard-vaarg.ll
index 29e66d9..bc039b8 100644
--- a/llvm/test/CodeGen/AArch64/stack-guard-vaarg.ll
+++ b/llvm/test/CodeGen/AArch64/stack-guard-vaarg.ll
@@ -9,7 +9,7 @@
; CHECK: ldr [[GUARD:x[0-9]+]]{{.*}}:lo12:__stack_chk_guard]
; Make sure the canary is placed relative to the frame pointer, not
; the stack pointer.
-; CHECK: stur [[GUARD]], [x29, #-24]
+; CHECK: stur [[GUARD]], [x29, #-8]
define void @test(i8* %i, ...) #0 {
entry:
%buf = alloca [10 x i8], align 1
diff --git a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-innerouter.ll b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-innerouter.ll
index 188cb5b..2e20ef6 100644
--- a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-innerouter.ll
+++ b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-innerouter.ll
@@ -202,16 +202,16 @@
define i32 @in_multiuse_A_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_A_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w8, w0, w1
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: and w20, w8, #0xffff00
; CHECK-NEXT: mov w0, w20
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 16776960
@@ -223,15 +223,15 @@
define i32 @in_multiuse_B_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_B_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w0, w0, w1
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: and w20, w0, #0xffff00
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 16776960
diff --git a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbits.ll b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbits.ll
index 2eeffe0..488d2cf 100644
--- a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbits.ll
+++ b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbits.ll
@@ -208,16 +208,16 @@
define i32 @in_multiuse_A_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_A_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w8, w0, w1
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: and w20, w8, #0x55555555
; CHECK-NEXT: mov w0, w20
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 1431655765
@@ -229,15 +229,15 @@
define i32 @in_multiuse_B_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_B_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w0, w0, w1
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: and w20, w0, #0x55555555
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 1431655765
diff --git a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
index a6ebeb1..d67ecfa 100644
--- a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
+++ b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
@@ -204,16 +204,16 @@
define i32 @in_multiuse_A_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_A_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w8, w0, w1
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: and w20, w8, #0xf0f0f0f
; CHECK-NEXT: mov w0, w20
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 252645135
@@ -225,15 +225,15 @@
define i32 @in_multiuse_B_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_B_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w0, w0, w1
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: and w20, w0, #0xf0f0f0f
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 252645135
diff --git a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll
index fc4f7eb..23f2206 100644
--- a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll
+++ b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll
@@ -197,16 +197,16 @@
define i32 @in_multiuse_A_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_A_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w8, w0, w1
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: and w20, w8, #0xffff
; CHECK-NEXT: mov w0, w20
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 65535
@@ -218,15 +218,15 @@
define i32 @in_multiuse_B_constmask(i32 %x, i32 %y, i32 %z) nounwind {
; CHECK-LABEL: in_multiuse_B_constmask:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w0, w0, w1
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: and w20, w0, #0xffff
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, 65535
diff --git a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll
index fdb5965..1860686 100644
--- a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll
+++ b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll
@@ -552,16 +552,16 @@
define i32 @in_multiuse_A(i32 %x, i32 %y, i32 %z, i32 %mask) nounwind {
; CHECK-LABEL: in_multiuse_A:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w8, w0, w1
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: and w20, w8, w3
; CHECK-NEXT: mov w0, w20
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, %mask
@@ -572,15 +572,15 @@
define i32 @in_multiuse_B(i32 %x, i32 %y, i32 %z, i32 %mask) nounwind {
; CHECK-LABEL: in_multiuse_B:
; CHECK: // %bb.0:
-; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: eor w0, w0, w1
-; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: and w20, w0, w3
; CHECK-NEXT: bl use32
; CHECK-NEXT: eor w0, w20, w19
-; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%n0 = xor i32 %x, %y
%n1 = and i32 %n0, %mask
diff --git a/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir b/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
index 5cf3bf9..b86f3b4 100644
--- a/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
+++ b/llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
@@ -14,11 +14,11 @@
body: |
bb.0:
STRXui undef $x8, %stack.0, 0
- ; CHECK: STURXi undef $x8, $fp, -24
+ ; CHECK: STRXui undef $x8, $fp, 0
B %bb.1
bb.1:
- liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp, $lr
- RET_ReallyLR implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26, implicit $x27, implicit $x28
+ liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28
+ RET_ReallyLR implicit $x19, implicit $x20, implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26, implicit $x27, implicit $x28
...
---
name: fpDoesNotFit
diff --git a/llvm/test/CodeGen/AArch64/win64_vararg.ll b/llvm/test/CodeGen/AArch64/win64_vararg.ll
index d9bb2ff..50f7bf5 100644
--- a/llvm/test/CodeGen/AArch64/win64_vararg.ll
+++ b/llvm/test/CodeGen/AArch64/win64_vararg.ll
@@ -103,21 +103,21 @@
declare i64* @__local_stdio_printf_options() local_unnamed_addr #4
; CHECK-LABEL: fp
-; CHECK: str x21, [sp, #-96]!
-; CHECK: stp x19, x20, [sp, #16]
-; CHECK: stp x29, x30, [sp, #32]
-; CHECK: add x29, sp, #32
-; CHECK: add x8, x29, #24
+; CHECK: stp x29, x30, [sp, #-96]
+; CHECK: str x21, [sp, #16]
+; CHECK: stp x19, x20, [sp, #32]
+; CHECK: mov x29, sp
+; CHECK: add x8, x29, #56
; CHECK: mov x19, x2
; CHECK: mov x20, x1
; CHECK: mov x21, x0
-; CHECK: stp x3, x4, [x29, #24]
-; CHECK: stp x5, x6, [x29, #40]
-; CHECK: str x7, [x29, #56]
-; CHECK: str x8, [sp, #8]
+; CHECK: stp x3, x4, [x29, #56]
+; CHECK: stp x5, x6, [x29, #72]
+; CHECK: str x7, [x29, #88]
+; CHECK: str x8, [x29, #24]
; CHECK: bl __local_stdio_printf_options
; CHECK: ldr x8, [x0]
-; CHECK: add x5, x29, #24
+; CHECK: add x5, x29, #56
; CHECK: mov x1, x21
; CHECK: mov x2, x20
; CHECK: orr x0, x8, #0x2
@@ -126,9 +126,9 @@
; CHECK: bl __stdio_common_vsprintf
; CHECK: cmp w0, #0
; CHECK: csinv w0, w0, wzr, ge
-; CHECK: ldp x29, x30, [sp, #32]
-; CHECK: ldp x19, x20, [sp, #16]
-; CHECK: ldr x21, [sp], #96
+; CHECK: ldp x19, x20, [sp, #32]
+; CHECK: ldr x21, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #96
; CHECK: ret
define i32 @fp(i8*, i64, i8*, ...) local_unnamed_addr #6 {
%4 = alloca i8*, align 8
@@ -150,26 +150,26 @@
attributes #6 = { "no-frame-pointer-elim"="true" }
; CHECK-LABEL: vla
-; CHECK: str x23, [sp, #-112]!
-; CHECK: stp x21, x22, [sp, #16]
-; CHECK: stp x19, x20, [sp, #32]
-; CHECK: stp x29, x30, [sp, #48]
-; CHECK: add x29, sp, #48
-; CHECK: add x8, x29, #16
-; CHECK: stur x8, [x29, #-40]
+; CHECK: stp x29, x30, [sp, #-112]!
+; CHECK: str x23, [sp, #16]
+; CHECK: stp x21, x22, [sp, #32]
+; CHECK: stp x19, x20, [sp, #48]
+; CHECK: mov x29, sp
+; CHECK: add x8, x29, #64
+; CHECK: str x8, [x29, #24]
; CHECK: mov w8, w0
; CHECK: add x8, x8, #15
; CHECK: lsr x15, x8, #4
; CHECK: mov x19, x1
; CHECK: mov [[REG2:x[0-9]+]], sp
-; CHECK: stp x2, x3, [x29, #16]
-; CHECK: stp x4, x5, [x29, #32]
-; CHECK: stp x6, x7, [x29, #48]
+; CHECK: stp x2, x3, [x29, #64]
+; CHECK: stp x4, x5, [x29, #80]
+; CHECK: stp x6, x7, [x29, #96]
; CHECK: bl __chkstk
; CHECK: mov x8, sp
; CHECK: sub [[REG:x[0-9]+]], x8, x15, lsl #4
; CHECK: mov sp, [[REG]]
-; CHECK: ldur [[REG3:x[0-9]+]], [x29, #-40]
+; CHECK: ldr [[REG3:x[0-9]+]], [x29, #24]
; CHECK: sxtw [[REG4:x[0-9]+]], w0
; CHECK: bl __local_stdio_printf_options
; CHECK: ldr x8, [x0]
@@ -181,11 +181,11 @@
; CHECK: mov x5, [[REG3]]
; CHECK: bl __stdio_common_vsprintf
; CHECK: mov sp, [[REG2]]
-; CHECK: sub sp, x29, #48
-; CHECK: ldp x29, x30, [sp, #48]
-; CHECK: ldp x19, x20, [sp, #32]
-; CHECK: ldp x21, x22, [sp, #16]
-; CHECK: ldr x23, [sp], #112
+; CHECK: mov sp, x29
+; CHECK: ldp x19, x20, [sp, #48]
+; CHECK: ldp x21, x22, [sp, #32]
+; CHECK: ldr x23, [sp, #16]
+; CHECK: ldp x29, x30, [sp], #112
; CHECK: ret
define void @vla(i32, i8*, ...) local_unnamed_addr {
%3 = alloca i8*, align 8
@@ -212,9 +212,9 @@
; CHECK-LABEL: snprintf
; CHECK-DAG: sub sp, sp, #96
-; CHECK-DAG: str x21, [sp, #16]
-; CHECK-DAG: stp x19, x20, [sp, #24]
-; CHECK-DAG: str x30, [sp, #40]
+; CHECK-DAG: str x30, [sp, #16]
+; CHECK-DAG: str x21, [sp, #24]
+; CHECK-DAG: stp x19, x20, [sp, #32]
; CHECK-DAG: add x8, sp, #56
; CHECK-DAG: mov x19, x2
; CHECK-DAG: mov x20, x1
@@ -232,9 +232,9 @@
; CHECK-DAG: mov x3, x19
; CHECK-DAG: mov x4, xzr
; CHECK-DAG: bl __stdio_common_vsprintf
-; CHECK-DAG: ldr x30, [sp, #40]
-; CHECK-DAG: ldp x19, x20, [sp, #24]
-; CHECK-DAG: ldr x21, [sp, #16]
+; CHECK-DAG: ldr x30, [sp, #16]
+; CHECK-DAG: ldr x21, [sp, #24]
+; CHECK-DAG: ldp x19, x20, [sp, #32]
; CHECK-DAG: cmp w0, #0
; CHECK-DAG: csinv w0, w0, wzr, ge
; CHECK-DAG: add sp, sp, #96
diff --git a/llvm/test/CodeGen/AArch64/wineh-frame5.mir b/llvm/test/CodeGen/AArch64/wineh-frame5.mir
index 64e9c2f..98897bf 100644
--- a/llvm/test/CodeGen/AArch64/wineh-frame5.mir
+++ b/llvm/test/CodeGen/AArch64/wineh-frame5.mir
@@ -3,12 +3,10 @@
# Check multiple epilogues, save_reg, save_reg_x.
# CHECK-LABEL: bb.0.entry:
-# CHECK: early-clobber $sp = frame-setup STRXpre killed $x28, $sp, -32
-# CHECK-NEXT: frame-setup SEH_SaveReg_X 28, -32
-# CHECK-NEXT: frame-setup STRXui killed $x19, $sp, 1
-# CHECK-NEXT: frame-setup SEH_SaveReg 19, 8
-# CHECK-NEXT: frame-setup STRXui killed $lr, $sp, 2
-# CHECK-NEXT: frame-setup SEH_SaveReg 30, 16
+# CHECK: early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -4
+# CHECK-NEXT: frame-setup SEH_SaveFPLR_X -32
+# CHECK-NEXT: frame-setup STRXui killed $x19, $sp, 2
+# CHECK-NEXT: frame-setup SEH_SaveReg 19, 16
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 496, 0
# CHECK-NEXT: frame-setup SEH_StackAlloc 496
# CHECK-NEXT: frame-setup SEH_PrologEnd
@@ -17,12 +15,10 @@
# CHECK: frame-destroy SEH_EpilogStart
# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 496, 0
# CHECK-NEXT: frame-destroy SEH_StackAlloc 496
-# CHECK-NEXT: $lr = frame-destroy LDRXui $sp, 2
-# CHECK-NEXT: frame-destroy SEH_SaveReg 30, 16
-# CHECK-NEXT: $x19 = frame-destroy LDRXui $sp, 1
-# CHECK-NEXT: frame-destroy SEH_SaveReg 19, 8
-# CHECK-NEXT: early-clobber $sp, $x28 = frame-destroy LDRXpost $sp, 32
-# CHECK-NEXT: frame-destroy SEH_SaveReg_X 28, -32
+# CHECK-NEXT: $x19 = frame-destroy LDRXui $sp, 2
+# CHECK-NEXT: frame-destroy SEH_SaveReg 19, 16
+# CHECK-NEXT: early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 4
+# CHECK-NEXT: frame-destroy SEH_SaveFPLR_X -32
# CHECK-NEXT: frame-destroy SEH_EpilogEnd
# CHECK-NEXT: TCRETURNdi @"?func2@@YAHXZ", 0, csr_aarch64_aapcs, implicit $sp
diff --git a/llvm/test/CodeGen/AArch64/wineh-frame7.mir b/llvm/test/CodeGen/AArch64/wineh-frame7.mir
index c5d0920..11591d3 100644
--- a/llvm/test/CodeGen/AArch64/wineh-frame7.mir
+++ b/llvm/test/CodeGen/AArch64/wineh-frame7.mir
@@ -3,10 +3,8 @@
# Test that stack probe results in Nop unwind codes in the prologue. Test
# save_fplr, save_reg_x and stack_alloc with multiple updates.
-# CHECK: early-clobber $sp = frame-setup STRXpre killed $x28, $sp, -32
-# CHECK-NEXT: frame-setup SEH_SaveReg_X 28, -32
-# CHECK-NEXT: frame-setup STPXi killed $fp, killed $lr, $sp, 2
-# CHECK-NEXT: frame-setup SEH_SaveFPLR 16
+# CHECK: early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2
+# CHECK-NEXT: frame-setup SEH_SaveFPLR_X -16
# CHECK-NEXT: $x15 = frame-setup MOVZXi 56009, 0
# CHECK-NEXT: frame-setup SEH_Nop
# CHECK-NEXT: $x15 = frame-setup MOVKXi $x15, 2, 16
@@ -21,10 +19,8 @@
# CHECK-NEXT: frame-destroy SEH_StackAlloc 2990080
# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 3216, 0
# CHECK-NEXT: frame-destroy SEH_StackAlloc 3216
-# CHECK-NEXT: $fp, $lr = frame-destroy LDPXi $sp, 2
-# CHECK-NEXT: frame-destroy SEH_SaveFPLR 16
-# CHECK-NEXT: early-clobber $sp, $x28 = frame-destroy LDRXpost $sp, 32
-# CHECK-NEXT: frame-destroy SEH_SaveReg_X 28, -32
+# CHECK-NEXT: early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 2
+# CHECK-NEXT: frame-destroy SEH_SaveFPLR_X -16
# CHECK-NEXT: frame-destroy SEH_EpilogEnd
# CHECK-NEXT: RET_ReallyLR implicit killed $w0
--- |
diff --git a/llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll b/llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll
index 78255fb..b10a0f3 100644
--- a/llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll
+++ b/llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll
@@ -9,17 +9,17 @@
; it shouldn't access the parent's frame via sp, and the prologue and
; epilogue should be symmetrical.
; CHECK-LABEL: "?catch$2@?0??a@@YAXXZ@4HA":
-; CHECK: str x28, [sp, #-32]!
-; CHECK-NEXT: str x19, [sp, #8]
-; CHECK-NEXT: stp x29, x30, [sp, #16]
+; CHECK: stp x29, x30, [sp, #-32]!
+; CHECK-NEXT: str x28, [sp, #16]
+; CHECK-NEXT: str x19, [sp, #24]
; CHECK-NEXT: add x0, x19, #64
; CHECK-NEXT: mov w1, wzr
; CHECK-NEXT: bl "?bb@@YAXPEAHH@Z"
; CHECK-NEXT: adrp x0, .LBB0_1
; CHECK-NEXT: add x0, x0, .LBB0_1
-; CHECK-NEXT: ldp x29, x30, [sp, #16]
-; CHECK-NEXT: ldr x19, [sp, #8]
-; CHECK-NEXT: ldr x28, [sp], #32
+; CHECK-NEXT: ldr x19, [sp, #24]
+; CHECK-NEXT: ldr x28, [sp, #16]
+; CHECK-NEXT: ldp x29, x30, [sp], #32
; CHECK-NEXT: ret
diff --git a/llvm/test/CodeGen/AArch64/wineh-try-catch.ll b/llvm/test/CodeGen/AArch64/wineh-try-catch.ll
index c631d77..3ae2df3 100644
--- a/llvm/test/CodeGen/AArch64/wineh-try-catch.ll
+++ b/llvm/test/CodeGen/AArch64/wineh-try-catch.ll
@@ -15,11 +15,11 @@
; on-entry sp - 672. We check this offset in the table later on.
; CHECK-LABEL: "?func@@YAHXZ":
-; CHECK: str x28, [sp, #-48]!
-; CHECK: str x21, [sp, #8]
-; CHECK: stp x19, x20, [sp, #16]
-; CHECK: stp x29, x30, [sp, #32]
-; CHECK: add x29, sp, #32
+; CHECK: stp x29, x30, [sp, #-48]!
+; CHECK: str x28, [sp, #16]
+; CHECK: str x21, [sp, #24]
+; CHECK: stp x19, x20, [sp, #32]
+; CHECK: mov x29, sp
; CHECK: sub sp, sp, #624
; CHECK: mov x19, sp
; CHECK: mov x0, #-2
@@ -47,10 +47,10 @@
; CHECK-LABEL: "?catch$2@?0??func@@YAHXZ@4HA":
; Check that the stack space is allocated only for the callee saved registers.
-; CHECK: str x28, [sp, #-48]!
-; CHECK: str x21, [sp, #8]
-; CHECK: stp x19, x20, [sp, #16]
-; CHECK: stp x29, x30, [sp, #32]
+; CHECK: stp x29, x30, [sp, #-48]!
+; CHECK: str x28, [sp, #16]
+; CHECK: str x21, [sp, #24]
+; CHECK: stp x19, x20, [sp, #32]
; CHECK: add x20, x19, #12
; Check that there are no further stack updates.
@@ -87,18 +87,18 @@
; UNWIND: Prologue [
; UNWIND-NEXT: ; nop
; UNWIND-NEXT: ; sub sp, #624
-; UNWIND-NEXT: ; add fp, sp, #32
-; UNWIND-NEXT: ; stp x29, x30, [sp, #32]
-; UNWIND-NEXT: ; stp x19, x20, [sp, #16]
-; UNWIND-NEXT: ; str x21, [sp, #8]
-; UNWIND-NEXT: ; str x28, [sp, #48]!
+; UNWIND-NEXT: ; mov fp, sp
+; UNWIND-NEXT: ; stp x19, x20, [sp, #32]
+; UNWIND-NEXT: ; str x21, [sp, #24]
+; UNWIND-NEXT: ; str x28, [sp, #16]
+; UNWIND-NEXT: ; stp x29, x30, [sp, #-48]!
; UNWIND-NEXT: ; end
; UNWIND: Function: ?catch$2@?0??func@@YAHXZ@4HA
; UNWIND: Prologue [
-; UNWIND-NEXT: ; stp x29, x30, [sp, #32]
-; UNWIND-NEXT: ; stp x19, x20, [sp, #16]
-; UNWIND-NEXT: ; str x21, [sp, #8]
-; UNWIND-NEXT: ; str x28, [sp, #48]!
+; UNWIND-NEXT: ; stp x19, x20, [sp, #32]
+; UNWIND-NEXT: ; str x21, [sp, #24]
+; UNWIND-NEXT: ; str x28, [sp, #16]
+; UNWIND-NEXT: ; stp x29, x30, [sp, #-48]!
; UNWIND-NEXT: ; end
target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"
diff --git a/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir b/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
index 418e19f..6b97a15 100644
--- a/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
+++ b/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
@@ -9,14 +9,14 @@
# The same test gets shrink wrapped on Linux ARM64.
# WIN64-LABEL: bb.0.entry:
-# WIN64: early-clobber $sp = frame-setup STRXpre killed $x28, $sp, -32
+# WIN64: early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -4
# WIN64-LABEL: bb.1:
# WIN64-LABEL: bb.2.if.then:
# LINUX-LABEL: bb.0.entry:
# LINUX-LABEL: bb.1:
# LINUX-LABEL: bb.2.if.then:
-# LINUX: early-clobber $sp = frame-setup STRXpre killed $x28, $sp, -32
+# LINUX: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -32
--- |
; ModuleID = 'shrink.cpp'
target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"