[AVR] Fix the build after setting alignment to 1 in r314179
Changing all types to be byte-aligned broke a small number of tests.
llvm-svn: 314183
diff --git a/llvm/test/CodeGen/AVR/call.ll b/llvm/test/CodeGen/AVR/call.ll
index bc6cb19..dd37b38 100644
--- a/llvm/test/CodeGen/AVR/call.ll
+++ b/llvm/test/CodeGen/AVR/call.ll
@@ -31,8 +31,8 @@
define i8 @calli8_stack() {
; CHECK-LABEL: calli8_stack:
; CHECK: ldi [[REG1:r[0-9]+]], 10
-; CHECK: push [[REG1]]
-; CHECK: ldi [[REG1]], 11
+; CHECK: ldi [[REG2:r[0-9]+]], 11
+; CHECK: push [[REG2]]
; CHECK: push [[REG1]]
; CHECK: call foo8_3
%result1 = call i8 @foo8_3(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11)
@@ -142,7 +142,7 @@
; CHECK-LABEL: testcallprologue:
; CHECK: push r28
; CHECK: push r29
-; CHECK: sbiw r28, 28
+; CHECK: sbiw r28, 27
; CHECK: ldi [[REG1:r[0-9]+]], 88
; CHECK: std Y+9, [[REG1]]
; CHECK: ldi [[REG1:r[0-9]+]], 11
diff --git a/llvm/test/CodeGen/AVR/directmem.ll b/llvm/test/CodeGen/AVR/directmem.ll
index 032263a..d0674cb 100644
--- a/llvm/test/CodeGen/AVR/directmem.ll
+++ b/llvm/test/CodeGen/AVR/directmem.ll
@@ -33,12 +33,12 @@
define void @array8_store() {
; CHECK-LABEL: array8_store:
+; CHECK: ldi [[REG1:r[0-9]+]], 3
+; CHECK: sts char.array+2, [[REG1]]
+; CHECK: ldi [[REG3:r[0-9]+]], 1
; CHECK: ldi [[REG2:r[0-9]+]], 2
; CHECK: sts char.array+1, [[REG2]]
-; CHECK: ldi [[REG1:r[0-9]+]], 1
-; CHECK: sts char.array, [[REG1]]
-; CHECK: ldi [[REG:r[0-9]+]], 3
-; CHECK: sts char.array+2, [[REG]]
+; CHECK: sts char.array, [[REG3]]
store i8 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 0)
store i8 2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 1)
store i8 3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 2)
diff --git a/llvm/test/CodeGen/AVR/varargs.ll b/llvm/test/CodeGen/AVR/varargs.ll
index 6f727cd..7224ac3 100644
--- a/llvm/test/CodeGen/AVR/varargs.ll
+++ b/llvm/test/CodeGen/AVR/varargs.ll
@@ -27,8 +27,8 @@
define i16 @varargs2(i8* nocapture %x, ...) {
; CHECK-LABEL: varargs2:
-; CHECK: ld r24, Z
-; CHECK: ldd r25, Z+1
+; CHECK: ldd r24, [[REG:X|Y|Z]]+{{[0-9]+}}
+; CHECK: ldd r25, [[REG]]+{{[0-9]+}}
%ap = alloca i8*
%ap1 = bitcast i8** %ap to i8*
call void @llvm.va_start(i8* %ap1)