commit f340787d7976fb86e0e9842f8b170964575800a9
author Tom Stellard <thomas.stellard@amd.com> Mon Nov 18 18:50:20 2013 +0000
committer Tom Stellard <thomas.stellard@amd.com> Mon Nov 18 18:50:20 2013 +0000
tree 0ce791aacf9224dbfb84f00e9af5f80b40036adb
parent 13de5456938e6245c9f69aa2f0d0833f9b463c47

R600/SI: Fix illegal VGPR->SGPR copy inside of loop

llvm-svn: 195026

llvm/lib/Target/R600/SIFixSGPRCopies.cpp

diff --git a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp
index b49fda9..3370c79 100644
--- a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp
@@ -188,8 +188,7 @@
     return false;
 
   SrcRC = inferRegClassFromDef(TRI, MRI, SrcReg, SrcSubReg);
-  return TRI->isSGPRClass(DstRC) &&
-         !TRI->getCommonSubClass(DstRC, SrcRC);
+  return TRI->isSGPRClass(DstRC) && TRI->hasVGPRs(SrcRC);
 }
 
 bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {