[tblgen][CodeGenSchedule] Add a check for invalid RegisterFile definitions with zero physical registers.
llvm-svn: 344235
diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp
index 881f1a8..f8d7d9a 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -1763,6 +1763,11 @@
// Now set the number of physical registers as well as the cost of registers
// in each register class.
CGRF.NumPhysRegs = RF->getValueAsInt("NumPhysRegs");
+ if (!CGRF.NumPhysRegs) {
+ PrintFatalError(RF->getLoc(),
+ "Invalid RegisterFile with zero physical registers");
+ }
+
RecVec RegisterClasses = RF->getValueAsListOfDefs("RegClasses");
std::vector<int64_t> RegisterCosts = RF->getValueAsListOfInts("RegCosts");
for (unsigned I = 0, E = RegisterClasses.size(); I < E; ++I) {