MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset.
This commit begins serialization of the CFI index machine operands by
serializing one kind of CFI instruction - the .cfi_def_cfa_offset instruction.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242845
diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.cpp b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
index ab9dff8..c88333e 100644
--- a/llvm/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
@@ -123,11 +123,12 @@
.Case("killed", MIToken::kw_killed)
.Case("undef", MIToken::kw_undef)
.Case("frame-setup", MIToken::kw_frame_setup)
+ .Case(".cfi_def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
.Default(MIToken::Identifier);
}
static Cursor maybeLexIdentifier(Cursor C, MIToken &Token) {
- if (!isalpha(C.peek()) && C.peek() != '_')
+ if (!isalpha(C.peek()) && C.peek() != '_' && C.peek() != '.')
return None;
auto Range = C;
while (isIdentifierChar(C.peek()))
diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.h b/llvm/lib/CodeGen/MIRParser/MILexer.h
index 7f36b9a..771f604 100644
--- a/llvm/lib/CodeGen/MIRParser/MILexer.h
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.h
@@ -44,6 +44,7 @@
kw_killed,
kw_undef,
kw_frame_setup,
+ kw_cfi_def_cfa_offset,
// Identifier tokens
Identifier,
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index ca98ae3..498ca06 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/raw_ostream.h"
@@ -111,6 +112,8 @@
bool parseConstantPoolIndexOperand(MachineOperand &Dest);
bool parseJumpTableIndexOperand(MachineOperand &Dest);
bool parseExternalSymbolOperand(MachineOperand &Dest);
+ bool parseCFIOffset(int &Offset);
+ bool parseCFIOperand(MachineOperand &Dest);
bool parseMachineOperand(MachineOperand &Dest);
private:
@@ -572,6 +575,29 @@
return false;
}
+bool MIParser::parseCFIOffset(int &Offset) {
+ if (Token.isNot(MIToken::IntegerLiteral))
+ return error("expected a cfi offset");
+ if (Token.integerValue().getMinSignedBits() > 32)
+ return error("expected a 32 bit integer (the cfi offset is too large)");
+ Offset = (int)Token.integerValue().getExtValue();
+ lex();
+ return false;
+}
+
+bool MIParser::parseCFIOperand(MachineOperand &Dest) {
+ // TODO: Parse the other CFI operands.
+ assert(Token.is(MIToken::kw_cfi_def_cfa_offset));
+ lex();
+ int Offset;
+ if (parseCFIOffset(Offset))
+ return true;
+ // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
+ Dest = MachineOperand::CreateCFIIndex(MF.getMMI().addFrameInst(
+ MCCFIInstruction::createDefCfaOffset(nullptr, -Offset)));
+ return false;
+}
+
bool MIParser::parseMachineOperand(MachineOperand &Dest) {
switch (Token.kind()) {
case MIToken::kw_implicit:
@@ -602,6 +628,8 @@
case MIToken::ExternalSymbol:
case MIToken::QuotedExternalSymbol:
return parseExternalSymbolOperand(Dest);
+ case MIToken::kw_cfi_def_cfa_offset:
+ return parseCFIOperand(Dest);
case MIToken::Error:
return true;
case MIToken::Identifier:
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 9413a7e..08eafb6 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MIRYamlMapping.h"
#include "llvm/IR/BasicBlock.h"
@@ -103,6 +104,8 @@
void printMBBReference(const MachineBasicBlock &MBB);
void printStackObjectReference(int FrameIndex);
void print(const MachineOperand &Op, const TargetRegisterInfo *TRI);
+
+ void print(const MCCFIInstruction &CFI);
};
} // end anonymous namespace
@@ -347,6 +350,8 @@
assert(TRI && "Expected target register info");
const auto *TII = SubTarget.getInstrInfo();
assert(TII && "Expected target instruction info");
+ if (MI.isCFIInstruction())
+ assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
unsigned I = 0, E = MI.getNumOperands();
for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
@@ -448,12 +453,32 @@
llvm_unreachable("Can't print this machine register mask yet.");
break;
}
+ case MachineOperand::MO_CFIIndex: {
+ const auto &MMI = Op.getParent()->getParent()->getParent()->getMMI();
+ print(MMI.getFrameInstructions()[Op.getCFIIndex()]);
+ break;
+ }
default:
// TODO: Print the other machine operands.
llvm_unreachable("Can't print this machine operand at the moment");
}
}
+void MIPrinter::print(const MCCFIInstruction &CFI) {
+ switch (CFI.getOperation()) {
+ case MCCFIInstruction::OpDefCfaOffset:
+ OS << ".cfi_def_cfa_offset ";
+ if (CFI.getLabel())
+ OS << "<mcsymbol> ";
+ OS << CFI.getOffset();
+ break;
+ default:
+ // TODO: Print the other CFI Operations.
+ OS << "<unserializable cfi operation>";
+ break;
+ }
+}
+
void llvm::printMIR(raw_ostream &OS, const Module &M) {
yaml::Output Out(OS);
Out << const_cast<Module &>(M);