commit f520093eb3f796e90e6a7ca01a50afe44bc09764
author Andrew Lenharth <andrewl@lenharth.org> Sun Dec 25 17:36:48 2005 +0000
committer Andrew Lenharth <andrewl@lenharth.org> Sun Dec 25 17:36:48 2005 +0000
tree 53fa9dd49129546a5b2bfb830d2da39f7644e943
parent 6b240e55d16557dd72767d9a5787d556f7b4c26c

add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG

llvm-svn: 25011

llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp

diff --git a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 59b9199..29627c5 100644
--- a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -136,9 +136,9 @@
   case MachineOperand::MO_GlobalAddress:
     //Abuse PCrel to specify pcrel calls
     //calls are the only thing that use this flag
-    if (MO.isPCRelative())
-      O << PrivateGlobalPrefix << Mang->getValueName(MO.getGlobal()) << "..ng";
-    else
+//     if (MO.isPCRelative())
+//       O << PrivateGlobalPrefix << Mang->getValueName(MO.getGlobal()) << "..ng";
+//     else
       O << Mang->getValueName(MO.getGlobal());
     return;