Add aliases for VAND imm to VBIC ~imm
On ARM NEON, VAND with immediate (16/32 bits) is an alias to VBIC ~imm with
the same type size. Adding that logic to the parser, and generating VBIC
instructions from VAND asm files.
This patch also fixes the validation routines for NEON splat immediates which
were wrong.
Fixes PR20702.
llvm-svn: 218450
diff --git a/llvm/test/MC/ARM/neon-bitwise-encoding.s b/llvm/test/MC/ARM/neon-bitwise-encoding.s
index 8c72288..d142dba 100644
--- a/llvm/test/MC/ARM/neon-bitwise-encoding.s
+++ b/llvm/test/MC/ARM/neon-bitwise-encoding.s
@@ -29,18 +29,63 @@
vbic d16, d17, d16
vbic q8, q8, q9
+ vbic q10, q11
+ vbic d9, d1
+ vbic.i16 d16, #0xFF00
+ vbic.i16 q8, #0xFF00
+ vbic.i16 d16, #0x00FF
+ vbic.i16 q8, #0x00FF
vbic.i32 d16, #0xFF000000
- vbic.i32 q8, #0xFF000000
- vbic q10, q11
- vbic d9, d1
+ vbic.i32 q8, #0xFF000000
+ vbic.i32 d16, #0x00FF0000
+ vbic.i32 q8, #0x00FF0000
+ vbic.i32 d16, #0x0000FF00
+ vbic.i32 q8, #0x0000FF00
+ vbic.i32 d16, #0x000000FF
+ vbic.i32 q8, #0x000000FF
@ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xf2]
@ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xf2]
-@ CHECK: vbic.i32 d16, #0xff000000 @ encoding: [0x3f,0x07,0xc7,0xf3]
-@ CHECK: vbic.i32 q8, #0xff000000 @ encoding: [0x7f,0x07,0xc7,0xf3]
@ CHECK: vbic q10, q10, q11 @ encoding: [0xf6,0x41,0x54,0xf2]
@ CHECK: vbic d9, d9, d1 @ encoding: [0x11,0x91,0x19,0xf2]
+@ CHECK: vbic.i16 d16, #0xff00 @ encoding: [0x3f,0x0b,0xc7,0xf3]
+@ CHECK: vbic.i16 q8, #0xff00 @ encoding: [0x7f,0x0b,0xc7,0xf3]
+@ CHECK: vbic.i16 d16, #0xff @ encoding: [0x3f,0x09,0xc7,0xf3]
+@ CHECK: vbic.i16 q8, #0xff @ encoding: [0x7f,0x09,0xc7,0xf3]
+@ CHECK: vbic.i32 d16, #0xff000000 @ encoding: [0x3f,0x07,0xc7,0xf3]
+@ CHECK: vbic.i32 q8, #0xff000000 @ encoding: [0x7f,0x07,0xc7,0xf3]
+@ CHECK: vbic.i32 d16, #0xff0000 @ encoding: [0x3f,0x05,0xc7,0xf3]
+@ CHECK: vbic.i32 q8, #0xff0000 @ encoding: [0x7f,0x05,0xc7,0xf3]
+@ CHECK: vbic.i32 d16, #0xff00 @ encoding: [0x3f,0x03,0xc7,0xf3]
+@ CHECK: vbic.i32 q8, #0xff00 @ encoding: [0x7f,0x03,0xc7,0xf3]
+@ CHECK: vbic.i32 d16, #0xff @ encoding: [0x3f,0x01,0xc7,0xf3]
+@ CHECK: vbic.i32 q8, #0xff @ encoding: [0x7f,0x01,0xc7,0xf3]
+ vand.i16 d10, #0xff03
+ vand.i16 q10, #0xff03
+ vand.i16 d10, #0x03ff
+ vand.i16 q10, #0x03ff
+ vand.i32 d10, #0x03ffffff
+ vand.i32 q10, #0x03ffffff
+ vand.i32 d10, #0xff03ffff
+ vand.i32 q10, #0xff03ffff
+ vand.i32 d10, #0xffff03ff
+ vand.i32 q10, #0xffff03ff
+ vand.i32 d10, #0xffffff03
+ vand.i32 q10, #0xffffff03
+
+@ CHECK: vbic.i16 d10, #0xfc @ encoding: [0x3c,0xa9,0x87,0xf3]
+@ CHECK: vbic.i16 q10, #0xfc @ encoding: [0x7c,0x49,0xc7,0xf3]
+@ CHECK: vbic.i16 d10, #0xfc00 @ encoding: [0x3c,0xab,0x87,0xf3]
+@ CHECK: vbic.i16 q10, #0xfc00 @ encoding: [0x7c,0x4b,0xc7,0xf3]
+@ CHECK: vbic.i32 d10, #0xfc000000 @ encoding: [0x3c,0xa7,0x87,0xf3]
+@ CHECK: vbic.i32 q10, #0xfc000000 @ encoding: [0x7c,0x47,0xc7,0xf3]
+@ CHECK: vbic.i32 d10, #0xfc0000 @ encoding: [0x3c,0xa5,0x87,0xf3]
+@ CHECK: vbic.i32 q10, #0xfc0000 @ encoding: [0x7c,0x45,0xc7,0xf3]
+@ CHECK: vbic.i32 d10, #0xfc00 @ encoding: [0x3c,0xa3,0x87,0xf3]
+@ CHECK: vbic.i32 q10, #0xfc00 @ encoding: [0x7c,0x43,0xc7,0xf3]
+@ CHECK: vbic.i32 d10, #0xfc @ encoding: [0x3c,0xa1,0x87,0xf3]
+@ CHECK: vbic.i32 q10, #0xfc @ encoding: [0x7c,0x41,0xc7,0xf3]
vorn d16, d17, d16
vorn q8, q8, q9