Last batch of test conversions to new atomic instructions.
llvm-svn: 140585
diff --git a/llvm/test/CodeGen/X86/membarrier.ll b/llvm/test/CodeGen/X86/membarrier.ll
index 42f8ef5..5e569aa 100644
--- a/llvm/test/CodeGen/X86/membarrier.ll
+++ b/llvm/test/CodeGen/X86/membarrier.ll
@@ -5,11 +5,8 @@
entry:
%i = alloca i32, align 4
store i32 1, i32* %i, align 4
- call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
- %0 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %i, i32 1)
- call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+ fence seq_cst
+ %0 = atomicrmw sub i32* %i, i32 1 monotonic
+ fence seq_cst
ret i32 0
}
-
-declare i32 @llvm.atomic.load.sub.i32.p0i32(i32* nocapture, i32) nounwind
-declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind