s/Method/Function
llvm-svn: 2180
diff --git a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
index 31eca39..69813c7 100644
--- a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
+++ b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
@@ -1504,13 +1504,13 @@
Destroyed.push_back(MethodLiveVarInfo::ID);
}
- bool runOnMethod(Method *M);
+ bool runOnMethod(Function *F);
};
} // end anonymous namespace
bool
-InstructionSchedulingWithSSA::runOnMethod(Method *M)
+InstructionSchedulingWithSSA::runOnMethod(Function *M)
{
if (SchedDebugLevel == Sched_Disable)
return false;
diff --git a/llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp b/llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp
index 810692f..02e50c0 100644
--- a/llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp
+++ b/llvm/lib/CodeGen/InstrSched/SchedPriorities.cpp
@@ -25,7 +25,7 @@
#include <iostream>
using std::cerr;
-SchedPriorities::SchedPriorities(const Method *method, const SchedGraph *G,
+SchedPriorities::SchedPriorities(const Function *, const SchedGraph *G,
MethodLiveVarInfo &LVI)
: curTime(0), graph(G), methodLiveVarInfo(LVI),
nodeDelayVec(G->getNumNodes(), INVALID_LATENCY), // make errors obvious
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
index ce92298..a381971 100644
--- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
+++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
@@ -62,7 +62,7 @@
//----------------------------------------------------------------------------
// class PhyRegAlloc:
// Main class the register allocator. Call allocateRegisters() to allocate
-// registers for a Method.
+// registers for a Function.
//----------------------------------------------------------------------------
@@ -70,7 +70,7 @@
std::vector<RegClass *> RegClassList; // vector of register classes
const TargetMachine &TM; // target machine
- const Method* Meth; // name of the method we work on
+ const Function *Meth; // name of the function we work on
MachineCodeForMethod &mcInfo; // descriptor for method's native code
MethodLiveVarInfo *const LVI; // LV information for this method
// (already computed for BBs)
@@ -85,7 +85,7 @@
// currently not used
public:
- PhyRegAlloc(Method *M, const TargetMachine& TM, MethodLiveVarInfo *Lvi,
+ PhyRegAlloc(Function *F, const TargetMachine& TM, MethodLiveVarInfo *Lvi,
cfg::LoopInfo *LoopDepthCalc);
~PhyRegAlloc();
diff --git a/llvm/lib/CodeGen/RegAlloc/RegClass.h b/llvm/lib/CodeGen/RegAlloc/RegClass.h
index 1e5f551..3db72b7 100644
--- a/llvm/lib/CodeGen/RegAlloc/RegClass.h
+++ b/llvm/lib/CodeGen/RegAlloc/RegClass.h
@@ -36,7 +36,7 @@
//
//-----------------------------------------------------------------------------
class RegClass {
- const Method *const Meth; // Method we are working on
+ const Function *const Meth; // Function we are working on
const MachineRegClassInfo *const MRC; // corresponding MRC
const unsigned RegClassID; // my int ID
@@ -47,7 +47,7 @@
const ReservedColorListType *const ReservedColorList;
//
// for passing registers that are pre-allocated and cannot be used by the
- // register allocator for this method.
+ // register allocator for this function.
bool *IsColorUsedArr;
//
@@ -69,14 +69,13 @@
public:
- RegClass(const Method *const M,
- const MachineRegClassInfo *const MRC,
- const ReservedColorListType *const RCL = NULL);
+ RegClass(const Function *M,
+ const MachineRegClassInfo *MRC,
+ const ReservedColorListType *RCL = 0);
- ~RegClass() { delete[] IsColorUsedArr; };
+ ~RegClass() { delete[] IsColorUsedArr; }
- inline void createInterferenceGraph()
- { IG.createGraph(); }
+ inline void createInterferenceGraph() { IG.createGraph(); }
inline InterferenceGraph &getIG() { return IG; }