commit f7760a24e5eba1bbaa0636ee24726f911aeb3647
author Andrew Trick <atrick@apple.com> Fri Dec 06 17:19:20 2013 +0000
committer Andrew Trick <atrick@apple.com> Fri Dec 06 17:19:20 2013 +0000
tree fb4b7860089b44ee8f0ca5865efaf44d6a43e52c
parent 9e264854120eb1d93b9a86a66f2af38f9ed90645

comment grammar

llvm-svn: 196585

llvm/lib/CodeGen/MachineScheduler.cpp

diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 1503596..de1968f 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -2177,7 +2177,7 @@
   unsigned IncMOps = SchedModel->getNumMicroOps(SU->getInstr());
   assert(
       (CurrMOps == 0 || (CurrMOps + IncMOps) <= SchedModel->getIssueWidth()) &&
-      "Cannot schedule this instructions MicroOps in the current cycle.");
+      "Cannot schedule this instruction's MicroOps in the current cycle.");
 
   unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle);
   DEBUG(dbgs() << "  Ready @" << ReadyCycle << "c\n");