commit f790ff3da06111b79b7a312aa37a4b1e9acc218c
author Simon Dardis <simon.dardis@imgtec.com> Tue Jan 10 13:57:44 2017 +0000
committer Simon Dardis <simon.dardis@imgtec.com> Tue Jan 10 13:57:44 2017 +0000
tree 14d3b4db1897ae7918bf85a5a67acbe6b542c887
parent 0f0407331e6a18f8e915f3f8facdf940c034da40

Revert "[mips] Honour -mno-odd-spreg for vector splat"

This reverts commit r291556. It was a mixture of two differentials and
was missing a test.

llvm-svn: 291562

llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 1370f05..7f79eb4 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -11,7 +11,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "MCTargetDesc/MipsABIInfo.h"
 #include "MipsTargetStreamer.h"
 #include "InstPrinter/MipsInstPrinter.h"
 #include "MipsELFStreamer.h"
@@ -686,17 +685,6 @@
   // issues as well.
   unsigned EFlags = MCA.getELFHeaderEFlags();
 
-  // FIXME: Fix a dependency issue by instantiating the ABI object to some
-  // default based off the triple. The triple doesn't describe the target
-  // fully, but any external user of the API that uses the MCTargetStreamer
-  // would otherwise crash on assertion failure.
-
-  ABI = MipsABIInfo(
-      STI.getTargetTriple().getArch() == Triple::ArchType::mipsel ||
-              STI.getTargetTriple().getArch() == Triple::ArchType::mips
-          ? MipsABIInfo::O32()
-          : MipsABIInfo::N64());
-
   // Architecture
   if (Features[Mips::FeatureMips64r6])
     EFlags |= ELF::EF_MIPS_ARCH_64R6;

llvm/lib/Target/Mips/MipsSEISelLowering.cpp

diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
index b98fb91..26e0f9a 100644
--- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
@@ -3377,12 +3377,8 @@
   DebugLoc DL = MI.getDebugLoc();
   unsigned Wd = MI.getOperand(0).getReg();
   unsigned Fs = MI.getOperand(1).getReg();
-  unsigned Wt1 = RegInfo.createVirtualRegister(
-      Subtarget.useOddSPReg() ? &Mips::MSA128WRegClass
-                              : &Mips::MSA128WEvensRegClass);
-  unsigned Wt2 = RegInfo.createVirtualRegister(
-      Subtarget.useOddSPReg() ? &Mips::MSA128WRegClass
-                              : &Mips::MSA128WEvensRegClass);
+  unsigned Wt1 = RegInfo.createVirtualRegister(&Mips::MSA128WRegClass);
+  unsigned Wt2 = RegInfo.createVirtualRegister(&Mips::MSA128WRegClass);
 
   BuildMI(*BB, MI, DL, TII->get(Mips::IMPLICIT_DEF), Wt1);
   BuildMI(*BB, MI, DL, TII->get(Mips::INSERT_SUBREG), Wt2)