diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 2f68106..64014dc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1768,7 +1768,8 @@
   
   // fold (sext (truncate x)) -> (sextinreg x).
   if (N0.getOpcode() == ISD::TRUNCATE && 
-      (!AfterLegalize || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, VT))) {
+      (!AfterLegalize || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG,
+                                              N0.getValueType()))) {
     SDOperand Op = N0.getOperand(0);
     if (Op.getValueType() < VT) {
       Op = DAG.getNode(ISD::ANY_EXTEND, VT, Op);