Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
llvm-svn: 52943
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index 8fbb2cf..18b0759 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -363,7 +363,7 @@
for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
const AsmWriterInst *Inst = getAsmWriterInstByID(i);
- if (Inst == 0) continue; // PHI, INLINEASM, LABEL, etc.
+ if (Inst == 0) continue; // PHI, INLINEASM, DBG_LABEL, etc.
std::string Command;
if (Inst->Operands.empty())
@@ -641,7 +641,7 @@
<< " O << \"\\t\";\n"
<< " printInlineAsm(MI);\n"
<< " return true;\n"
- << " } else if (MI->getOpcode() == TargetInstrInfo::LABEL) {\n"
+ << " } else if (MI->isLabel()) {\n"
<< " printLabel(MI);\n"
<< " return true;\n"
<< " } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n"
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index a21a31c..557a8f4 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -26,7 +26,9 @@
Record *R = *I;
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
- R->getName() == "LABEL" ||
+ R->getName() == "DBG_LABEL" ||
+ R->getName() == "EH_LABEL" ||
+ R->getName() == "GC_LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
@@ -102,7 +104,9 @@
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
- R->getName() == "LABEL" ||
+ R->getName() == "DBG_LABEL" ||
+ R->getName() == "EH_LABEL" ||
+ R->getName() == "GC_LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
@@ -137,7 +141,9 @@
if (InstName == "PHI" ||
InstName == "INLINEASM" ||
- InstName == "LABEL"||
+ InstName == "DBG_LABEL"||
+ InstName == "EH_LABEL"||
+ InstName == "GC_LABEL"||
InstName == "DECLARE"||
InstName == "EXTRACT_SUBREG" ||
InstName == "INSERT_SUBREG" ||
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index 2aae877..a09068e 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -286,9 +286,17 @@
if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
const CodeGenInstruction *INLINEASM = &I->second;
- I = getInstructions().find("LABEL");
- if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!";
- const CodeGenInstruction *LABEL = &I->second;
+ I = getInstructions().find("DBG_LABEL");
+ if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
+ const CodeGenInstruction *DBG_LABEL = &I->second;
+
+ I = getInstructions().find("EH_LABEL");
+ if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
+ const CodeGenInstruction *EH_LABEL = &I->second;
+
+ I = getInstructions().find("GC_LABEL");
+ if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
+ const CodeGenInstruction *GC_LABEL = &I->second;
I = getInstructions().find("DECLARE");
if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
@@ -317,7 +325,9 @@
// Print out the rest of the instructions now.
NumberedInstructions.push_back(PHI);
NumberedInstructions.push_back(INLINEASM);
- NumberedInstructions.push_back(LABEL);
+ NumberedInstructions.push_back(DBG_LABEL);
+ NumberedInstructions.push_back(EH_LABEL);
+ NumberedInstructions.push_back(GC_LABEL);
NumberedInstructions.push_back(DECLARE);
NumberedInstructions.push_back(EXTRACT_SUBREG);
NumberedInstructions.push_back(INSERT_SUBREG);
@@ -326,7 +336,9 @@
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
if (&II->second != PHI &&
&II->second != INLINEASM &&
- &II->second != LABEL &&
+ &II->second != DBG_LABEL &&
+ &II->second != EH_LABEL &&
+ &II->second != GC_LABEL &&
&II->second != DECLARE &&
&II->second != EXTRACT_SUBREG &&
&II->second != INSERT_SUBREG &&
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index 5075d48..b3a75de 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -1864,20 +1864,6 @@
<< " N.getValueType());\n"
<< "}\n\n";
- OS << "SDNode *Select_LABEL(const SDOperand &N) {\n"
- << " SDOperand Chain = N.getOperand(0);\n"
- << " SDOperand N1 = N.getOperand(1);\n"
- << " SDOperand N2 = N.getOperand(2);\n"
- << " unsigned C1 = cast<ConstantSDNode>(N1)->getValue();\n"
- << " unsigned C2 = cast<ConstantSDNode>(N2)->getValue();\n"
- << " SDOperand Tmp1 = CurDAG->getTargetConstant(C1, MVT::i32);\n"
- << " SDOperand Tmp2 = CurDAG->getTargetConstant(C2, MVT::i32);\n"
- << " AddToISelQueue(Chain);\n"
- << " SDOperand Ops[] = { Tmp1, Tmp2, Chain };\n"
- << " return CurDAG->getTargetNode(TargetInstrInfo::LABEL,\n"
- << " MVT::Other, Ops, 3);\n"
- << "}\n\n";
-
OS << "SDNode *Select_DECLARE(const SDOperand &N) {\n"
<< " SDOperand Chain = N.getOperand(0);\n"
<< " SDOperand N1 = N.getOperand(1);\n"
@@ -1956,12 +1942,13 @@
<< " case ISD::TokenFactor:\n"
<< " case ISD::CopyFromReg:\n"
<< " case ISD::CopyToReg: {\n"
+ << " case ISD::DBG_LABEL:\n"
+ << " case ISD::EH_LABEL:\n"
<< " for (unsigned i = 0, e = N.getNumOperands(); i != e; ++i)\n"
<< " AddToISelQueue(N.getOperand(i));\n"
<< " return NULL;\n"
<< " }\n"
<< " case ISD::INLINEASM: return Select_INLINEASM(N);\n"
- << " case ISD::LABEL: return Select_LABEL(N);\n"
<< " case ISD::DECLARE: return Select_DECLARE(N);\n"
<< " case ISD::EXTRACT_SUBREG: return Select_EXTRACT_SUBREG(N);\n"
<< " case ISD::INSERT_SUBREG: return Select_INSERT_SUBREG(N);\n"
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index fb8dd37..c29f5c4 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -279,7 +279,9 @@
// This isn't an error if this is a builtin instruction.
if (R->getName() != "PHI" &&
R->getName() != "INLINEASM" &&
- R->getName() != "LABEL" &&
+ R->getName() != "DBG_LABEL" &&
+ R->getName() != "EH_LABEL" &&
+ R->getName() != "GC_LABEL" &&
R->getName() != "DECLARE" &&
R->getName() != "EXTRACT_SUBREG" &&
R->getName() != "INSERT_SUBREG" &&