commit fb2f1d61f4e7ecb3339ffc97c155c768b9087057
author Jim Grosbach <grosbach@apple.com> Tue Nov 01 01:24:45 2011 +0000
committer Jim Grosbach <grosbach@apple.com> Tue Nov 01 01:24:45 2011 +0000
tree 2e9c3137b0740570bdd7072ec04324d5049c50d8
parent a7efb88baa5e6f6f60677b454d3c3d04a0f5f7e8

ARM VLD/VST assembly parsing for symbolic address operands.

llvm-svn: 143413

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index c31c5e6..1bc585b 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -63,7 +63,7 @@
 { "fixup_arm_ldst_pcrel_12", 1,            24,  MCFixupKindInfo::FKF_IsPCRel },
 { "fixup_t2_ldst_pcrel_12",  0,            32,  MCFixupKindInfo::FKF_IsPCRel |
                                    MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
-{ "fixup_arm_pcrel_10",      1,            24,  MCFixupKindInfo::FKF_IsPCRel },
+{ "fixup_arm_pcrel_10",      0,            32,  MCFixupKindInfo::FKF_IsPCRel },
 { "fixup_t2_pcrel_10",       0,            32,  MCFixupKindInfo::FKF_IsPCRel |
                                    MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
 { "fixup_thumb_adr_pcrel_10",0,            8,   MCFixupKindInfo::FKF_IsPCRel |