assorted fixes:
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
* fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
* fix nasty thinko - didn't use two-address form of conditional add
for extending bools to integers, so occasionally there would be
garbage in the result. it's amazing how often zeros are just
sitting around in registers ;) - this should fix a bunch of tests.
llvm-svn: 21221
diff --git a/llvm/lib/Target/IA64/IA64AsmPrinter.cpp b/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
index 2759301..2846a04 100644
--- a/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
+++ b/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
@@ -225,14 +225,6 @@
}
}
- void printS16ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
- O << (short)MI->getOperand(OpNo).getImmedValue();
- }
- void printU16ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
- O << (unsigned short)MI->getOperand(OpNo).getImmedValue();
- }
void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {
int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
@@ -245,17 +237,11 @@
if(val>=8192) val=val-16384; // if negative, flip sign
O << val;
}
- void printS21ImmOperand(const MachineInstr *MI, unsigned OpNo,
+ void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {
- O << (int)MI->getOperand(OpNo).getImmedValue(); // FIXME (21, not 32!)
- }
- void printS32ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
- O << (int)MI->getOperand(OpNo).getImmedValue();
- }
- void printU32ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
- O << (unsigned int)MI->getOperand(OpNo).getImmedValue();
+ int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
+ if(val>=2097152) val=val-4194304; // if negative, flip sign
+ O << val;
}
void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) {