Added phi elimination code

llvm-svn: 1265
diff --git a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
index 266d424..533d74c 100644
--- a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
+++ b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
@@ -943,11 +943,12 @@
 }
 
 
-void
+
+void UltraSparcInstrInfo::
 CreateCopyInstructionsByType(const TargetMachine& target,
                              Value* src,
                              Instruction* dest,
-                             vector<MachineInstr*>& minstrVec)
+                             vector<MachineInstr*>& minstrVec) const
 {
   bool loadConstantToReg = false;
   
@@ -1004,6 +1005,7 @@
 }
 
 
+
 //******************* Externally Visible Functions *************************/
 
 
@@ -2048,7 +2050,7 @@
       else
         {
           vector<MachineInstr*> minstrVec;
-          CreateCopyInstructionsByType(target,
+          target.getInstrInfo().CreateCopyInstructionsByType(target,
                 subtreeRoot->getInstruction()->getOperand(forwardOperandNum),
                 subtreeRoot->getInstruction(), minstrVec);
           assert(minstrVec.size() > 0);
diff --git a/llvm/lib/Target/Sparc/SparcInternals.h b/llvm/lib/Target/Sparc/SparcInternals.h
index 0e48b96..9b8fe17 100644
--- a/llvm/lib/Target/Sparc/SparcInternals.h
+++ b/llvm/lib/Target/Sparc/SparcInternals.h
@@ -139,6 +139,15 @@
                                            vector<MachineInstr*>& minstrVec,
                                            vector<TmpInstruction*>& tempVec,
                                            TargetMachine& target) const;
+
+ // create copy instruction(s)
+  virtual void
+  CreateCopyInstructionsByType(const TargetMachine& target,
+                             Value* src,
+                             Instruction* dest,
+                             vector<MachineInstr*>& minstrVec) const;
+
+
 };
 
 
@@ -1278,7 +1287,7 @@
   static const int MinStackFrameSize                       = 176;
   static const int NumFixedOutgoingArgs                    =   6;
   static const int SizeOfEachArgOnStack                    =   8;
-  static const int StaticAreaOffsetFromFP                  =   0 + OFFSET;
+  static const int StaticAreaOffsetFromFP                  =  0 + OFFSET;
   static const int FirstIncomingArgOffsetFromFP            = 128 + OFFSET;
   static const int FirstOptionalIncomingArgOffsetFromFP    = 176 + OFFSET;
   static const int FirstOutgoingArgOffsetFromSP            = 128 + OFFSET;
diff --git a/llvm/lib/Target/Sparc/SparcRegInfo.cpp b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
index cb7009d..4040b02 100644
--- a/llvm/lib/Target/Sparc/SparcRegInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
@@ -893,7 +893,6 @@
 // register number
 //---------------------------------------------------------------------------
 
-
 MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg, 
 					      const unsigned DestReg,
 					      const int RegType) const {
@@ -1040,24 +1039,56 @@
 
 
 
-// Following method is Not needed now
 
-MachineInstr* UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest) const {
+//---------------------------------------------------------------------------
+// Generate a copy instruction to copy a value to another. Temporarily
+// used by PhiElimination code.
+//---------------------------------------------------------------------------
+
+
+MachineInstr * UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest) const{
+
+  int RegType = getRegType( Src );
+
+  assert( (RegType==getRegType(Src))  && "Src & Dest are diff types");
 
   MachineInstr * MI = NULL;
 
-  MI = new MachineInstr(ADD, 3);
-  MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false);
-  MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
-  MI->SetMachineOperand(2, MachineOperand:: MO_VirtualRegister, Dest, true);
-  
+  switch( RegType ) {
+    
+  case IntRegType:
+
+    MI = new MachineInstr(ADD, 3);
+    MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false);
+    MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
+    MI->SetMachineOperand(2, MachineOperand:: MO_VirtualRegister, Dest, true);
+    break;
+
+  case FPSingleRegType:
+    MI = new MachineInstr(FMOVS, 2);
+    MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false);
+    MI->SetMachineOperand(1, MachineOperand:: MO_VirtualRegister, Dest, true);
+    break;
+
+
+  case FPDoubleRegType:
+    MI = new MachineInstr(FMOVD, 2);
+    MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false);
+    MI->SetMachineOperand(1, MachineOperand:: MO_VirtualRegister, Dest, true);
+    break;
+
+  default:
+    assert(0 && "Unknow RegType in CpValu2Value");
+  }
 
   return MI;
-
 }
 
 
 
+
+
+
 //----------------------------------------------------------------------------
 // This method inserts caller saving/restoring instructons before/after
 // a call machine instruction.