CodeGen: Change MachineInstr to use MachineInstr&, NFC
Change MachineInstr API to prefer MachineInstr& over MachineInstr*
whenever the parameter is expected to be non-null. Slowly inching
toward being able to fix PR26753.
llvm-svn: 262149
diff --git a/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp b/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
index 3c46a99..5ce2550 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
@@ -40,7 +40,7 @@
assert(MI.isDebugValue() && "not a DBG_VALUE");
auto &Ranges = VarInstrRanges[Var];
if (!Ranges.empty() && Ranges.back().second == nullptr &&
- Ranges.back().first->isIdenticalTo(&MI)) {
+ Ranges.back().first->isIdenticalTo(MI)) {
DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
<< "\t" << Ranges.back().first << "\t" << MI << "\n");
return;
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index 8babedb..c580d0e 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -357,7 +357,7 @@
--I2;
}
// I1, I2==first (untested) non-DBGs preceding known match
- if (!I1->isIdenticalTo(I2) ||
+ if (!I1->isIdenticalTo(*I2) ||
// FIXME: This check is dubious. It's used to get around a problem where
// people incorrectly expect inline asm directives to remain in the same
// relative order. This is untenable because normal compiler
@@ -777,7 +777,7 @@
assert(MBBICommon != MBBIECommon &&
"Reached BB end within common tail length!");
- assert(MBBICommon->isIdenticalTo(&*MBBI) && "Expected matching MIIs!");
+ assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
if (MBBICommon->mayLoad() || MBBICommon->mayStore())
MBBICommon->setMemRefs(MBBICommon->mergeMemRefsWith(*MBBI));
@@ -1275,7 +1275,7 @@
// DBG_VALUE at the beginning of MBB.
while (PrevBBIter != PrevBB.begin() && MBBIter != MBB->end()
&& PrevBBIter->isDebugValue() && MBBIter->isDebugValue()) {
- if (!MBBIter->isIdenticalTo(PrevBBIter))
+ if (!MBBIter->isIdenticalTo(*PrevBBIter))
break;
MachineInstr *DuplicateDbg = MBBIter;
++MBBIter; -- PrevBBIter;
@@ -1762,7 +1762,7 @@
if (FIB == FIE)
break;
}
- if (!TIB->isIdenticalTo(FIB, MachineInstr::CheckKillDead))
+ if (!TIB->isIdenticalTo(*FIB, MachineInstr::CheckKillDead))
break;
if (TII->isPredicated(*TIB))
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 9e898db..a4ce9c6 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -580,7 +580,7 @@
if (FIB == FIE)
break;
}
- if (!TIB->isIdenticalTo(FIB))
+ if (!TIB->isIdenticalTo(*FIB))
break;
++Dups1;
++TIB;
@@ -624,7 +624,7 @@
if (FIE == FIB)
break;
}
- if (!TIE->isIdenticalTo(FIE))
+ if (!TIE->isIdenticalTo(*FIE))
break;
++Dups2;
--TIE;
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 51335f8..e1c682e 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -948,23 +948,23 @@
}
}
-bool MachineInstr::isIdenticalTo(const MachineInstr *Other,
+bool MachineInstr::isIdenticalTo(const MachineInstr &Other,
MICheckType Check) const {
// If opcodes or number of operands are not the same then the two
// instructions are obviously not identical.
- if (Other->getOpcode() != getOpcode() ||
- Other->getNumOperands() != getNumOperands())
+ if (Other.getOpcode() != getOpcode() ||
+ Other.getNumOperands() != getNumOperands())
return false;
if (isBundle()) {
// Both instructions are bundles, compare MIs inside the bundle.
MachineBasicBlock::const_instr_iterator I1 = getIterator();
MachineBasicBlock::const_instr_iterator E1 = getParent()->instr_end();
- MachineBasicBlock::const_instr_iterator I2 = Other->getIterator();
- MachineBasicBlock::const_instr_iterator E2= Other->getParent()->instr_end();
+ MachineBasicBlock::const_instr_iterator I2 = Other.getIterator();
+ MachineBasicBlock::const_instr_iterator E2 = Other.getParent()->instr_end();
while (++I1 != E1 && I1->isInsideBundle()) {
++I2;
- if (I2 == E2 || !I2->isInsideBundle() || !I1->isIdenticalTo(&*I2, Check))
+ if (I2 == E2 || !I2->isInsideBundle() || !I1->isIdenticalTo(*I2, Check))
return false;
}
}
@@ -972,7 +972,7 @@
// Check operands to make sure they match.
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
const MachineOperand &MO = getOperand(i);
- const MachineOperand &OMO = Other->getOperand(i);
+ const MachineOperand &OMO = Other.getOperand(i);
if (!MO.isReg()) {
if (!MO.isIdenticalTo(OMO))
return false;
@@ -1005,8 +1005,8 @@
}
// If DebugLoc does not match then two dbg.values are not identical.
if (isDebugValue())
- if (getDebugLoc() && Other->getDebugLoc() &&
- getDebugLoc() != Other->getDebugLoc())
+ if (getDebugLoc() && Other.getDebugLoc() &&
+ getDebugLoc() != Other.getDebugLoc())
return false;
return true;
}
@@ -1615,10 +1615,10 @@
/// copyImplicitOps - Copy implicit register operands from specified
/// instruction to this instruction.
void MachineInstr::copyImplicitOps(MachineFunction &MF,
- const MachineInstr *MI) {
- for (unsigned i = MI->getDesc().getNumOperands(), e = MI->getNumOperands();
+ const MachineInstr &MI) {
+ for (unsigned i = MI.getDesc().getNumOperands(), e = MI.getNumOperands();
i != e; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
+ const MachineOperand &MO = MI.getOperand(i);
if ((MO.isReg() && MO.isImplicit()) || MO.isRegMask())
addOperand(MF, MO);
}
diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index defffea..eccd1e8 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -383,7 +383,7 @@
TargetInstrInfo::produceSameValue(const MachineInstr *MI0,
const MachineInstr *MI1,
const MachineRegisterInfo *MRI) const {
- return MI0->isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs);
+ return MI0->isIdenticalTo(*MI1, MachineInstr::IgnoreVRegDefs);
}
MachineInstr *TargetInstrInfo::duplicate(MachineInstr *Orig,