commit fd8cc23220d25dfe6956470da8bd63d26649c428
author Duncan P. N. Exon Smith <dexonsmith@apple.com> Sat Feb 27 20:01:33 2016 +0000
committer Duncan P. N. Exon Smith <dexonsmith@apple.com> Sat Feb 27 20:01:33 2016 +0000
tree 121ce8d85170b862228e2a15d45da0bc7ad8b68b
parent 982224cfb8de39337e977219b3571c5a87aca4ce

CodeGen: Change MachineInstr to use MachineInstr&, NFC

Change MachineInstr API to prefer MachineInstr& over MachineInstr*
whenever the parameter is expected to be non-null.  Slowly inching
toward being able to fix PR26753.

llvm-svn: 262149

llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp

diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index 34dddb1..8bbc2e0 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -572,7 +572,7 @@
   unsigned NewOpc = Hexagon::L4_return;
   MachineInstr *NewI = BuildMI(MBB, RetI, DL, HII.get(NewOpc));
   // Transfer the function live-out registers.
-  NewI->copyImplicitOps(MF, RetI);
+  NewI->copyImplicitOps(MF, *RetI);
   MBB.erase(RetI);
 }
 
@@ -983,7 +983,7 @@
       DeallocCall = BuildMI(MBB, It, DL, HII.get(ROpc))
           .addExternalSymbol(RestoreFn);
       // Transfer the function live-out registers.
-      DeallocCall->copyImplicitOps(MF, It);
+      DeallocCall->copyImplicitOps(MF, *It);
     }
     addCalleeSaveRegistersAsImpOperand(DeallocCall, MaxR, true);
     return true;