commit fdb78f8baee78909c8003d5dff92dee76d50c6d0
author Matt Arsenault <Matthew.Arsenault@amd.com> Tue Jan 10 23:08:54 2017 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Tue Jan 10 23:08:54 2017 +0000
tree c63ac64436718a1cf3c0073b0bb2145401a638d5
parent 20d252c4c1bb982555457cd8df72cfd28523da27

InstCombine: fdiv -x, -y -> fdiv x, y

llvm-svn: 291611

llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index ac646717..04f0384 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1443,6 +1443,16 @@
     }
   }
 
+  Value *LHS;
+  Value *RHS;
+
+  // -x / -y -> x / y
+  if (match(Op0, m_FNeg(m_Value(LHS))) && match(Op1, m_FNeg(m_Value(RHS)))) {
+    I.setOperand(0, LHS);
+    I.setOperand(1, RHS);
+    return &I;
+  }
+
   return nullptr;
 }