commit fdea5e02ce598be1cdda0259381039e8b5d6cba5
author Matt Arsenault <Matthew.Arsenault@amd.com> Tue Oct 01 02:23:20 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Tue Oct 01 02:23:20 2019 +0000
tree 72813d8d277f088768ddff527a0cbc2c78748d10
parent b169ee2eca0e8349678feaa2686f55c30bf1d836

AMDGPU/GlobalISel: Select s1 src G_SITOFP/G_UITOFP

llvm-svn: 373298

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
index 4aadcd9..d3c83a6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
@@ -79,6 +79,7 @@
   bool selectPHI(MachineInstr &I) const;
   bool selectG_TRUNC(MachineInstr &I) const;
   bool selectG_SZA_EXT(MachineInstr &I) const;
+  bool selectG_SITOFP_UITOFP(MachineInstr &I) const;
   bool selectG_CONSTANT(MachineInstr &I) const;
   bool selectG_AND_OR_XOR(MachineInstr &I) const;
   bool selectG_ADD_SUB(MachineInstr &I) const;