commit fdf36729c71f443bf49dc33d5ddc33ba0597f2d2
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jul 01 15:42:47 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jul 01 15:42:47 2019 +0000
tree d00191cb0581225951380a0ef5b5b503ac88dc16
parent 6464280eb0446e00ff12f59355671c57ce5132aa

AMDGPU/GlobalISel: Make s16 select legal

This is easy to handle and avoids legalization artifacts which are
likely to obscure combines.

llvm-svn: 364787

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index df62b61..59ddb46 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -515,10 +515,10 @@
 
   // TODO: Pointer types, any 32-bit or 64-bit vector
   getActionDefinitionsBuilder(G_SELECT)
-    .legalForCartesianProduct({S32, S64, V2S32, V2S16, V4S16,
+    .legalForCartesianProduct({S32, S64, S16, V2S32, V2S16, V4S16,
           GlobalPtr, LocalPtr, FlatPtr, PrivatePtr,
           LLT::vector(2, LocalPtr), LLT::vector(2, PrivatePtr)}, {S1})
-    .clampScalar(0, S32, S64)
+    .clampScalar(0, S16, S64)
     .moreElementsIf(isSmallOddVector(0), oneMoreElement(0))
     .fewerElementsIf(numElementsNotEven(0), scalarize(0))
     .scalarize(1)