Teach tblgen to accept register source operands in patterns, e.g.
def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
"shl{b} {%cl, $dst|$dst, %CL}",
[(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;
This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.
llvm-svn: 24557
diff --git a/llvm/utils/TableGen/DAGISelEmitter.h b/llvm/utils/TableGen/DAGISelEmitter.h
index 404b00b..ed1e978 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.h
+++ b/llvm/utils/TableGen/DAGISelEmitter.h
@@ -418,9 +418,12 @@
void EmitMatchForPattern(TreePatternNode *N, const std::string &RootName,
std::map<std::string,std::string> &VarMap,
unsigned PatternNo, std::ostream &OS);
+ void EmitCopyToRegsForPattern(TreePatternNode *N, const std::string &RootName,
+ std::ostream &OS, bool &InFlag);
unsigned CodeGenPatternResult(TreePatternNode *N, unsigned &Ctr,
std::map<std::string,std::string> &VariableMap,
- std::ostream &OS, bool isRoot = false);
+ std::ostream &OS, bool InFlag,
+ bool isRoot = false);
void EmitCodeForPattern(PatternToMatch &Pattern, std::ostream &OS);
void EmitInstructionSelector(std::ostream &OS);
};