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gerrit-public.fairphone.software / toolchain / llvm-project / 0344cdfe390842fd62e73a8a0cb4eb495c355076 / . / llvm / test / CodeGen / R600 / build_vector.ll
blob: 9b738a278067967127192cdc7fd9587e7ec8a494 [file] [log] [blame]
Tom Stellard0344cdf2013-08-01 15:23:42 +0000[diff] [blame^]1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
2; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
3
4; R600-CHECK: @build_vector2
5; R600-CHECK: MOV
6; R600-CHECK: MOV
7; R600-CHECK-NOT: MOV
8; SI-CHECK: @build_vector2
9; SI-CHECK-DAG: V_MOV_B32_e32 [[X:VGPR[0-9]]], 5
10; SI-CHECK-DAG: V_MOV_B32_e32 [[Y:VGPR[0-9]]], 6
11; SI-CHECK: BUFFER_STORE_DWORDX2 [[X]]_[[Y]]
12define void @build_vector2 (<2 x i32> addrspace(1)* %out) {
13entry:
14 store <2 x i32> <i32 5, i32 6>, <2 x i32> addrspace(1)* %out
15 ret void
16}
17
18; R600-CHECK: @build_vector4
19; R600-CHECK: MOV
20; R600-CHECK: MOV
21; R600-CHECK: MOV
22; R600-CHECK: MOV
23; R600-CHECK-NOT: MOV
24; SI-CHECK: @build_vector4
25; SI-CHECK-DAG: V_MOV_B32_e32 [[X:VGPR[0-9]]], 5
26; SI-CHECK-DAG: V_MOV_B32_e32 [[Y:VGPR[0-9]]], 6
27; SI-CHECK-DAG: V_MOV_B32_e32 [[Z:VGPR[0-9]]], 7
28; SI-CHECK-DAG: V_MOV_B32_e32 [[W:VGPR[0-9]]], 8
29; SI-CHECK: BUFFER_STORE_DWORDX4 [[X]]_[[Y]]_[[Z]]_[[W]]
30define void @build_vector4 (<4 x i32> addrspace(1)* %out) {
31entry:
32 store <4 x i32> <i32 5, i32 6, i32 7, i32 8>, <4 x i32> addrspace(1)* %out
33 ret void
34}