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Nate Begeman6cca84e2005-10-16 05:39:50 +00001//===-- PPCJITInfo.cpp - Implement the JIT interfaces for the PowerPC -----===//
Misha Brukmanb4402432005-04-21 23:30:14 +00002//
Chris Lattner8296c4c2004-11-23 06:02:06 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanb4402432005-04-21 23:30:14 +00007//
Chris Lattner8296c4c2004-11-23 06:02:06 +00008//===----------------------------------------------------------------------===//
9//
10// This file implements the JIT interfaces for the 32-bit PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "jit"
Chris Lattner0aa794b2005-10-14 23:53:41 +000015#include "PPCJITInfo.h"
Chris Lattner6f3b9542005-10-14 23:59:06 +000016#include "PPCRelocations.h"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +000017#include "PPCTargetMachine.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000018#include "llvm/IR/Function.h"
Evan Chengf6acb342006-07-25 20:40:54 +000019#include "llvm/Support/Debug.h"
Torok Edwinfb8d6d52009-07-08 20:53:28 +000020#include "llvm/Support/ErrorHandling.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000021#include "llvm/Support/Memory.h"
Torok Edwinfb8d6d52009-07-08 20:53:28 +000022#include "llvm/Support/raw_ostream.h"
Chris Lattner8296c4c2004-11-23 06:02:06 +000023using namespace llvm;
24
25static TargetJITInfo::JITCompilerFn JITCompilerFunction;
26
27#define BUILD_ADDIS(RD,RS,IMM16) \
28 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
29#define BUILD_ORI(RD,RS,UIMM16) \
30 ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
Nate Begeman18f03292006-08-29 02:30:59 +000031#define BUILD_ORIS(RD,RS,UIMM16) \
32 ((25 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
33#define BUILD_RLDICR(RD,RS,SH,ME) \
34 ((30 << 26) | ((RS) << 21) | ((RD) << 16) | (((SH) & 31) << 11) | \
Chris Lattner13535c22006-12-07 23:44:07 +000035 (((ME) & 63) << 6) | (1 << 2) | ((((SH) >> 5) & 1) << 1))
Chris Lattner8296c4c2004-11-23 06:02:06 +000036#define BUILD_MTSPR(RS,SPR) \
37 ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
38#define BUILD_BCCTRx(BO,BI,LINK) \
39 ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
Nate Begeman18f03292006-08-29 02:30:59 +000040#define BUILD_B(TARGET, LINK) \
41 ((18 << 26) | (((TARGET) & 0x00FFFFFF) << 2) | ((LINK) & 1))
Chris Lattner8296c4c2004-11-23 06:02:06 +000042
43// Pseudo-ops
44#define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
Nate Begeman18f03292006-08-29 02:30:59 +000045#define BUILD_SLDI(RD,RS,IMM6) BUILD_RLDICR(RD,RS,IMM6,63-IMM6)
Chris Lattner8296c4c2004-11-23 06:02:06 +000046#define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
47#define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
48
Nate Begeman18f03292006-08-29 02:30:59 +000049static void EmitBranchToAt(uint64_t At, uint64_t To, bool isCall, bool is64Bit){
50 intptr_t Offset = ((intptr_t)To - (intptr_t)At) >> 2;
51 unsigned *AtI = (unsigned*)(intptr_t)At;
Chris Lattner8296c4c2004-11-23 06:02:06 +000052
Nate Begeman18f03292006-08-29 02:30:59 +000053 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
54 AtI[0] = BUILD_B(Offset, isCall); // b/bl target
55 } else if (!is64Bit) {
56 AtI[0] = BUILD_LIS(12, To >> 16); // lis r12, hi16(address)
57 AtI[1] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
58 AtI[2] = BUILD_MTCTR(12); // mtctr r12
59 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
60 } else {
61 AtI[0] = BUILD_LIS(12, To >> 48); // lis r12, hi16(address)
62 AtI[1] = BUILD_ORI(12, 12, To >> 32); // ori r12, r12, lo16(address)
63 AtI[2] = BUILD_SLDI(12, 12, 32); // sldi r12, r12, 32
64 AtI[3] = BUILD_ORIS(12, 12, To >> 16); // oris r12, r12, hi16(address)
65 AtI[4] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
66 AtI[5] = BUILD_MTCTR(12); // mtctr r12
67 AtI[6] = BUILD_BCTR(isCall); // bctr/bctrl
68 }
Chris Lattner8296c4c2004-11-23 06:02:06 +000069}
70
Chris Lattner078b6f22004-11-24 21:01:46 +000071extern "C" void PPC32CompilationCallback();
Nate Begeman18f03292006-08-29 02:30:59 +000072extern "C" void PPC64CompilationCallback();
Chris Lattner078b6f22004-11-24 21:01:46 +000073
Rafael Espindola05b5a462013-07-26 22:13:57 +000074#if (!defined(__ppc__) && !defined(__powerpc__)) || defined(__powerpc64__) || defined(__ppc64__)
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +000075void PPC32CompilationCallback() {
76 llvm_unreachable("This is not a 32bit PowerPC, you can't execute this!");
77}
78#elif !defined(__ELF__)
Chris Lattner078b6f22004-11-24 21:01:46 +000079// CompilationCallback stub - We can't use a C function with inline assembly in
80// it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
81// write our own wrapper, which does things our way, so we have complete control
82// over register saving and restoring.
83asm(
84 ".text\n"
85 ".align 2\n"
86 ".globl _PPC32CompilationCallback\n"
87"_PPC32CompilationCallback:\n"
Nate Begeman01364fb2006-05-02 04:50:05 +000088 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
89 // FIXME: need to save v[0-19] for altivec?
Nate Begeman18f03292006-08-29 02:30:59 +000090 // FIXME: could shrink frame
Nate Begeman01364fb2006-05-02 04:50:05 +000091 // Set up a proper stack frame
Jim Laskeye95909a2006-12-11 18:10:54 +000092 // FIXME Layout
Roman Divacky6874b262011-06-15 15:29:47 +000093 // PowerPC32 ABI linkage - 24 bytes
Jim Laskeye95909a2006-12-11 18:10:54 +000094 // parameters - 32 bytes
95 // 13 double registers - 104 bytes
96 // 8 int registers - 32 bytes
Jim Laskey6af22202006-12-10 13:09:42 +000097 "mflr r0\n"
Jim Laskeye95909a2006-12-11 18:10:54 +000098 "stw r0, 8(r1)\n"
99 "stwu r1, -208(r1)\n"
Nate Begeman01364fb2006-05-02 04:50:05 +0000100 // Save all int arg registers
101 "stw r10, 204(r1)\n" "stw r9, 200(r1)\n"
102 "stw r8, 196(r1)\n" "stw r7, 192(r1)\n"
103 "stw r6, 188(r1)\n" "stw r5, 184(r1)\n"
104 "stw r4, 180(r1)\n" "stw r3, 176(r1)\n"
Chris Lattner078b6f22004-11-24 21:01:46 +0000105 // Save all call-clobbered FP regs.
Nate Begeman01364fb2006-05-02 04:50:05 +0000106 "stfd f13, 168(r1)\n" "stfd f12, 160(r1)\n"
107 "stfd f11, 152(r1)\n" "stfd f10, 144(r1)\n"
108 "stfd f9, 136(r1)\n" "stfd f8, 128(r1)\n"
109 "stfd f7, 120(r1)\n" "stfd f6, 112(r1)\n"
110 "stfd f5, 104(r1)\n" "stfd f4, 96(r1)\n"
111 "stfd f3, 88(r1)\n" "stfd f2, 80(r1)\n"
112 "stfd f1, 72(r1)\n"
113 // Arguments to Compilation Callback:
114 // r3 - our lr (address of the call instruction in stub plus 4)
115 // r4 - stub's lr (address of instruction that called the stub plus 4)
Chris Lattner09fecf92006-12-08 04:54:03 +0000116 // r5 - is64Bit - always 0.
Nate Begeman01364fb2006-05-02 04:50:05 +0000117 "mr r3, r0\n"
118 "lwz r2, 208(r1)\n" // stub's frame
119 "lwz r4, 8(r2)\n" // stub's lr
Nate Begeman18f03292006-08-29 02:30:59 +0000120 "li r5, 0\n" // 0 == 32 bit
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000121 "bl _LLVMPPCCompilationCallback\n"
Nate Begeman01364fb2006-05-02 04:50:05 +0000122 "mtctr r3\n"
123 // Restore all int arg registers
124 "lwz r10, 204(r1)\n" "lwz r9, 200(r1)\n"
125 "lwz r8, 196(r1)\n" "lwz r7, 192(r1)\n"
126 "lwz r6, 188(r1)\n" "lwz r5, 184(r1)\n"
127 "lwz r4, 180(r1)\n" "lwz r3, 176(r1)\n"
128 // Restore all FP arg registers
129 "lfd f13, 168(r1)\n" "lfd f12, 160(r1)\n"
130 "lfd f11, 152(r1)\n" "lfd f10, 144(r1)\n"
131 "lfd f9, 136(r1)\n" "lfd f8, 128(r1)\n"
132 "lfd f7, 120(r1)\n" "lfd f6, 112(r1)\n"
133 "lfd f5, 104(r1)\n" "lfd f4, 96(r1)\n"
134 "lfd f3, 88(r1)\n" "lfd f2, 80(r1)\n"
135 "lfd f1, 72(r1)\n"
136 // Pop 3 frames off the stack and branch to target
137 "lwz r1, 208(r1)\n"
138 "lwz r2, 8(r1)\n"
139 "mtlr r2\n"
140 "bctr\n"
Chris Lattner078b6f22004-11-24 21:01:46 +0000141 );
Chris Lattner249edb82007-02-25 05:04:13 +0000142
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000143#else
144// ELF PPC 32 support
Chris Lattner249edb82007-02-25 05:04:13 +0000145
146// CompilationCallback stub - We can't use a C function with inline assembly in
147// it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
148// write our own wrapper, which does things our way, so we have complete control
149// over register saving and restoring.
150asm(
151 ".text\n"
152 ".align 2\n"
153 ".globl PPC32CompilationCallback\n"
154"PPC32CompilationCallback:\n"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000155 // Make space for 8 ints r[3-10] and 8 doubles f[1-8] and the
Chris Lattner249edb82007-02-25 05:04:13 +0000156 // FIXME: need to save v[0-19] for altivec?
157 // FIXME: could shrink frame
158 // Set up a proper stack frame
159 // FIXME Layout
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000160 // 8 double registers - 64 bytes
Chris Lattner249edb82007-02-25 05:04:13 +0000161 // 8 int registers - 32 bytes
162 "mflr 0\n"
163 "stw 0, 4(1)\n"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000164 "stwu 1, -104(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000165 // Save all int arg registers
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000166 "stw 10, 100(1)\n" "stw 9, 96(1)\n"
167 "stw 8, 92(1)\n" "stw 7, 88(1)\n"
168 "stw 6, 84(1)\n" "stw 5, 80(1)\n"
169 "stw 4, 76(1)\n" "stw 3, 72(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000170 // Save all call-clobbered FP regs.
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000171 "stfd 8, 64(1)\n"
172 "stfd 7, 56(1)\n" "stfd 6, 48(1)\n"
173 "stfd 5, 40(1)\n" "stfd 4, 32(1)\n"
174 "stfd 3, 24(1)\n" "stfd 2, 16(1)\n"
175 "stfd 1, 8(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000176 // Arguments to Compilation Callback:
177 // r3 - our lr (address of the call instruction in stub plus 4)
178 // r4 - stub's lr (address of instruction that called the stub plus 4)
179 // r5 - is64Bit - always 0.
180 "mr 3, 0\n"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000181 "lwz 5, 104(1)\n" // stub's frame
182 "lwz 4, 4(5)\n" // stub's lr
Chris Lattner249edb82007-02-25 05:04:13 +0000183 "li 5, 0\n" // 0 == 32 bit
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000184 "bl LLVMPPCCompilationCallback\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000185 "mtctr 3\n"
186 // Restore all int arg registers
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000187 "lwz 10, 100(1)\n" "lwz 9, 96(1)\n"
188 "lwz 8, 92(1)\n" "lwz 7, 88(1)\n"
189 "lwz 6, 84(1)\n" "lwz 5, 80(1)\n"
190 "lwz 4, 76(1)\n" "lwz 3, 72(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000191 // Restore all FP arg registers
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000192 "lfd 8, 64(1)\n"
193 "lfd 7, 56(1)\n" "lfd 6, 48(1)\n"
194 "lfd 5, 40(1)\n" "lfd 4, 32(1)\n"
195 "lfd 3, 24(1)\n" "lfd 2, 16(1)\n"
196 "lfd 1, 8(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000197 // Pop 3 frames off the stack and branch to target
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000198 "lwz 1, 104(1)\n"
199 "lwz 0, 4(1)\n"
200 "mtlr 0\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000201 "bctr\n"
202 );
Nate Begeman61776062004-11-23 21:34:18 +0000203#endif
204
David Fang75ca7ce2013-07-24 07:52:16 +0000205#if !defined(__powerpc64__) && !defined(__ppc64__)
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000206void PPC64CompilationCallback() {
207 llvm_unreachable("This is not a 64bit PowerPC, you can't execute this!");
208}
209#else
210# ifdef __ELF__
Roman Divacky6874b262011-06-15 15:29:47 +0000211asm(
212 ".text\n"
213 ".align 2\n"
214 ".globl PPC64CompilationCallback\n"
Roman Divackye07cc042012-05-09 18:24:23 +0000215 ".section \".opd\",\"aw\",@progbits\n"
Roman Divacky6874b262011-06-15 15:29:47 +0000216 ".align 3\n"
217"PPC64CompilationCallback:\n"
218 ".quad .L.PPC64CompilationCallback,.TOC.@tocbase,0\n"
219 ".size PPC64CompilationCallback,24\n"
220 ".previous\n"
221 ".align 4\n"
222 ".type PPC64CompilationCallback,@function\n"
223".L.PPC64CompilationCallback:\n"
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000224# else
Nate Begeman18f03292006-08-29 02:30:59 +0000225asm(
226 ".text\n"
227 ".align 2\n"
228 ".globl _PPC64CompilationCallback\n"
229"_PPC64CompilationCallback:\n"
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000230# endif
Nate Begeman18f03292006-08-29 02:30:59 +0000231 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
232 // FIXME: need to save v[0-19] for altivec?
233 // Set up a proper stack frame
Jim Laskeye95909a2006-12-11 18:10:54 +0000234 // Layout
235 // PowerPC64 ABI linkage - 48 bytes
236 // parameters - 64 bytes
237 // 13 double registers - 104 bytes
238 // 8 int registers - 64 bytes
Roman Divacky6874b262011-06-15 15:29:47 +0000239 "mflr 0\n"
240 "std 0, 16(1)\n"
241 "stdu 1, -280(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000242 // Save all int arg registers
Roman Divacky6874b262011-06-15 15:29:47 +0000243 "std 10, 272(1)\n" "std 9, 264(1)\n"
244 "std 8, 256(1)\n" "std 7, 248(1)\n"
245 "std 6, 240(1)\n" "std 5, 232(1)\n"
246 "std 4, 224(1)\n" "std 3, 216(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000247 // Save all call-clobbered FP regs.
Roman Divacky6874b262011-06-15 15:29:47 +0000248 "stfd 13, 208(1)\n" "stfd 12, 200(1)\n"
249 "stfd 11, 192(1)\n" "stfd 10, 184(1)\n"
250 "stfd 9, 176(1)\n" "stfd 8, 168(1)\n"
251 "stfd 7, 160(1)\n" "stfd 6, 152(1)\n"
252 "stfd 5, 144(1)\n" "stfd 4, 136(1)\n"
253 "stfd 3, 128(1)\n" "stfd 2, 120(1)\n"
254 "stfd 1, 112(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000255 // Arguments to Compilation Callback:
256 // r3 - our lr (address of the call instruction in stub plus 4)
257 // r4 - stub's lr (address of instruction that called the stub plus 4)
Chris Lattner09fecf92006-12-08 04:54:03 +0000258 // r5 - is64Bit - always 1.
Roman Divacky6874b262011-06-15 15:29:47 +0000259 "mr 3, 0\n" // return address (still in r0)
260 "ld 5, 280(1)\n" // stub's frame
261 "ld 4, 16(5)\n" // stub's lr
262 "li 5, 1\n" // 1 == 64 bit
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000263# ifdef __ELF__
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000264 "bl LLVMPPCCompilationCallback\n"
Roman Divacky6874b262011-06-15 15:29:47 +0000265 "nop\n"
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000266# else
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000267 "bl _LLVMPPCCompilationCallback\n"
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000268# endif
Roman Divacky6874b262011-06-15 15:29:47 +0000269 "mtctr 3\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000270 // Restore all int arg registers
Roman Divacky6874b262011-06-15 15:29:47 +0000271 "ld 10, 272(1)\n" "ld 9, 264(1)\n"
272 "ld 8, 256(1)\n" "ld 7, 248(1)\n"
273 "ld 6, 240(1)\n" "ld 5, 232(1)\n"
274 "ld 4, 224(1)\n" "ld 3, 216(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000275 // Restore all FP arg registers
Roman Divacky6874b262011-06-15 15:29:47 +0000276 "lfd 13, 208(1)\n" "lfd 12, 200(1)\n"
277 "lfd 11, 192(1)\n" "lfd 10, 184(1)\n"
278 "lfd 9, 176(1)\n" "lfd 8, 168(1)\n"
279 "lfd 7, 160(1)\n" "lfd 6, 152(1)\n"
280 "lfd 5, 144(1)\n" "lfd 4, 136(1)\n"
281 "lfd 3, 128(1)\n" "lfd 2, 120(1)\n"
282 "lfd 1, 112(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000283 // Pop 3 frames off the stack and branch to target
Roman Divacky6874b262011-06-15 15:29:47 +0000284 "ld 1, 280(1)\n"
285 "ld 0, 16(1)\n"
286 "mtlr 0\n"
287 // XXX: any special TOC handling in the ELF case for JIT?
Nate Begeman18f03292006-08-29 02:30:59 +0000288 "bctr\n"
289 );
Nate Begeman18f03292006-08-29 02:30:59 +0000290#endif
291
Anton Korobeynikov325e9262012-04-03 06:59:28 +0000292extern "C" {
Benjamin Kramerde712b72013-02-17 14:30:32 +0000293LLVM_LIBRARY_VISIBILITY void *
Rafael Espindola91cbcbb2013-02-15 14:15:59 +0000294LLVMPPCCompilationCallback(unsigned *StubCallAddrPlus4,
295 unsigned *OrigCallAddrPlus4,
296 bool is64Bit) {
Nate Begeman318bb962006-04-25 04:45:59 +0000297 // Adjust the pointer to the address of the call instruction in the stub
298 // emitted by emitFunctionStub, rather than the instruction after it.
299 unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
300 unsigned *OrigCallAddr = OrigCallAddrPlus4 - 1;
Chris Lattner4ff11752004-11-23 06:55:05 +0000301
Nate Begeman318bb962006-04-25 04:45:59 +0000302 void *Target = JITCompilerFunction(StubCallAddr);
Chris Lattner4ff11752004-11-23 06:55:05 +0000303
Nate Begeman318bb962006-04-25 04:45:59 +0000304 // Check to see if *OrigCallAddr is a 'bl' instruction, and if we can rewrite
305 // it to branch directly to the destination. If so, rewrite it so it does not
306 // need to go through the stub anymore.
307 unsigned OrigCallInst = *OrigCallAddr;
308 if ((OrigCallInst >> 26) == 18) { // Direct call.
309 intptr_t Offset = ((intptr_t)Target - (intptr_t)OrigCallAddr) >> 2;
310
Chris Lattner4ff11752004-11-23 06:55:05 +0000311 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
Chris Lattner659d72e2004-11-24 18:00:02 +0000312 // Clear the original target out.
Nate Begeman318bb962006-04-25 04:45:59 +0000313 OrigCallInst &= (63 << 26) | 3;
Chris Lattner659d72e2004-11-24 18:00:02 +0000314 // Fill in the new target.
Nate Begeman318bb962006-04-25 04:45:59 +0000315 OrigCallInst |= (Offset & ((1 << 24)-1)) << 2;
Chris Lattner659d72e2004-11-24 18:00:02 +0000316 // Replace the call.
Nate Begeman318bb962006-04-25 04:45:59 +0000317 *OrigCallAddr = OrigCallInst;
Chris Lattner4ff11752004-11-23 06:55:05 +0000318 }
319 }
Misha Brukmanb4402432005-04-21 23:30:14 +0000320
Nate Begeman318bb962006-04-25 04:45:59 +0000321 // Assert that we are coming from a stub that was created with our
322 // emitFunctionStub.
Nate Begeman18f03292006-08-29 02:30:59 +0000323 if ((*StubCallAddr >> 26) == 18)
324 StubCallAddr -= 3;
325 else {
Nate Begeman318bb962006-04-25 04:45:59 +0000326 assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
Nate Begeman18f03292006-08-29 02:30:59 +0000327 StubCallAddr -= is64Bit ? 9 : 6;
328 }
Chris Lattner4ff11752004-11-23 06:55:05 +0000329
330 // Rewrite the stub with an unconditional branch to the target, for any users
331 // who took the address of the stub.
Nate Begeman18f03292006-08-29 02:30:59 +0000332 EmitBranchToAt((intptr_t)StubCallAddr, (intptr_t)Target, false, is64Bit);
Jeffrey Yasskin3aa70b22010-01-14 23:15:26 +0000333 sys::Memory::InvalidateInstructionCache(StubCallAddr, 7*4);
Chris Lattner4ff11752004-11-23 06:55:05 +0000334
Nate Begeman318bb962006-04-25 04:45:59 +0000335 // Put the address of the target function to call and the address to return to
336 // after calling the target function in a place that is easy to get on the
337 // stack after we restore all regs.
Nate Begeman18f03292006-08-29 02:30:59 +0000338 return Target;
Chris Lattner4ff11752004-11-23 06:55:05 +0000339}
Anton Korobeynikov325e9262012-04-03 06:59:28 +0000340}
Chris Lattner4ff11752004-11-23 06:55:05 +0000341
342
343
Misha Brukmanb4402432005-04-21 23:30:14 +0000344TargetJITInfo::LazyResolverFn
Nate Begeman6cca84e2005-10-16 05:39:50 +0000345PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
Chris Lattner4ff11752004-11-23 06:55:05 +0000346 JITCompilerFunction = Fn;
Nate Begeman18f03292006-08-29 02:30:59 +0000347 return is64Bit ? PPC64CompilationCallback : PPC32CompilationCallback;
Chris Lattner4ff11752004-11-23 06:55:05 +0000348}
349
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000350TargetJITInfo::StubLayout PPCJITInfo::getStubLayout() {
351 // The stub contains up to 10 4-byte instructions, aligned at 4 bytes: 3
352 // instructions to save the caller's address if this is a lazy-compilation
353 // stub, plus a 1-, 4-, or 7-instruction sequence to load an arbitrary address
354 // into a register and jump through it.
355 StubLayout Result = {10*4, 4};
356 return Result;
357}
358
Rafael Espindola05b5a462013-07-26 22:13:57 +0000359#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
360defined(__APPLE__)
Chris Lattner919ad972008-01-25 16:41:09 +0000361extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
362#endif
363
Nicolas Geoffraya7557df2008-04-16 20:46:05 +0000364void *PPCJITInfo::emitFunctionStub(const Function* F, void *Fn,
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000365 JITCodeEmitter &JCE) {
Chris Lattner8296c4c2004-11-23 06:02:06 +0000366 // If this is just a call to an external function, emit a branch instead of a
367 // call. The code is the same except for one bit of the last instruction.
Nate Begeman18f03292006-08-29 02:30:59 +0000368 if (Fn != (void*)(intptr_t)PPC32CompilationCallback &&
369 Fn != (void*)(intptr_t)PPC64CompilationCallback) {
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000370 void *Addr = (void*)JCE.getCurrentPCValue();
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000371 JCE.emitWordBE(0);
372 JCE.emitWordBE(0);
373 JCE.emitWordBE(0);
374 JCE.emitWordBE(0);
375 JCE.emitWordBE(0);
376 JCE.emitWordBE(0);
377 JCE.emitWordBE(0);
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000378 EmitBranchToAt((intptr_t)Addr, (intptr_t)Fn, false, is64Bit);
379 sys::Memory::InvalidateInstructionCache(Addr, 7*4);
380 return Addr;
Chris Lattner8296c4c2004-11-23 06:02:06 +0000381 }
382
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000383 void *Addr = (void*)JCE.getCurrentPCValue();
Nate Begeman18f03292006-08-29 02:30:59 +0000384 if (is64Bit) {
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000385 JCE.emitWordBE(0xf821ffb1); // stdu r1,-80(r1)
386 JCE.emitWordBE(0x7d6802a6); // mflr r11
387 JCE.emitWordBE(0xf9610060); // std r11, 96(r1)
Tilmann Scheller773f14c2009-07-03 06:47:08 +0000388 } else if (TM.getSubtargetImpl()->isDarwinABI()){
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000389 JCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
390 JCE.emitWordBE(0x7d6802a6); // mflr r11
391 JCE.emitWordBE(0x91610028); // stw r11, 40(r1)
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000392 } else {
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000393 JCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
394 JCE.emitWordBE(0x7d6802a6); // mflr r11
395 JCE.emitWordBE(0x91610024); // stw r11, 36(r1)
Nate Begeman18f03292006-08-29 02:30:59 +0000396 }
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000397 intptr_t BranchAddr = (intptr_t)JCE.getCurrentPCValue();
398 JCE.emitWordBE(0);
399 JCE.emitWordBE(0);
400 JCE.emitWordBE(0);
401 JCE.emitWordBE(0);
402 JCE.emitWordBE(0);
403 JCE.emitWordBE(0);
404 JCE.emitWordBE(0);
Chris Lattner919ad972008-01-25 16:41:09 +0000405 EmitBranchToAt(BranchAddr, (intptr_t)Fn, true, is64Bit);
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000406 sys::Memory::InvalidateInstructionCache(Addr, 10*4);
407 return Addr;
Chris Lattner8296c4c2004-11-23 06:02:06 +0000408}
409
410
Nate Begeman6cca84e2005-10-16 05:39:50 +0000411void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
412 unsigned NumRelocs, unsigned char* GOTBase) {
Chris Lattner8296c4c2004-11-23 06:02:06 +0000413 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
414 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
415 intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
416 switch ((PPC::RelocationType)MR->getRelocationType()) {
Torok Edwinfbcc6632009-07-14 16:55:14 +0000417 default: llvm_unreachable("Unknown relocation type!");
Chris Lattner8296c4c2004-11-23 06:02:06 +0000418 case PPC::reloc_pcrel_bx:
419 // PC-relative relocation for b and bl instructions.
420 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
421 assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
422 "Relocation out of range!");
423 *RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
424 break;
Evan Cheng78bf1072006-07-27 18:21:10 +0000425 case PPC::reloc_pcrel_bcx:
426 // PC-relative relocation for BLT,BLE,BEQ,BGE,BGT,BNE, or other
427 // bcx instructions.
428 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
429 assert(ResultPtr >= -(1 << 13) && ResultPtr < (1 << 13) &&
430 "Relocation out of range!");
431 *RelocPos |= (ResultPtr & ((1 << 14)-1)) << 2;
432 break;
Chris Lattnerdd516792004-11-24 22:30:08 +0000433 case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
Chris Lattner5b17dee2006-07-12 21:23:20 +0000434 case PPC::reloc_absolute_low: { // low bits of ref -> low 16 of instr
Chris Lattner8296c4c2004-11-23 06:02:06 +0000435 ResultPtr += MR->getConstantVal();
436
Chris Lattnerdd516792004-11-24 22:30:08 +0000437 // If this is a high-part access, get the high-part.
Nate Begeman69df6132006-09-08 22:42:09 +0000438 if (MR->getRelocationType() == PPC::reloc_absolute_high) {
Chris Lattner8296c4c2004-11-23 06:02:06 +0000439 // If the low part will have a carry (really a borrow) from the low
440 // 16-bits into the high 16, add a bit to borrow from.
441 if (((int)ResultPtr << 16) < 0)
442 ResultPtr += 1 << 16;
443 ResultPtr >>= 16;
444 }
445
446 // Do the addition then mask, so the addition does not overflow the 16-bit
447 // immediate section of the instruction.
448 unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
449 unsigned HighBits = *RelocPos & ~65535;
450 *RelocPos = LowBits | HighBits; // Slam into low 16-bits
451 break;
452 }
Chris Lattner5b17dee2006-07-12 21:23:20 +0000453 case PPC::reloc_absolute_low_ix: { // low bits of ref -> low 14 of instr
454 ResultPtr += MR->getConstantVal();
455 // Do the addition then mask, so the addition does not overflow the 16-bit
456 // immediate section of the instruction.
457 unsigned LowBits = (*RelocPos + ResultPtr) & 0xFFFC;
458 unsigned HighBits = *RelocPos & 0xFFFF0003;
459 *RelocPos = LowBits | HighBits; // Slam into low 14-bits.
460 break;
461 }
462 }
Chris Lattner8296c4c2004-11-23 06:02:06 +0000463 }
464}
465
Nate Begeman6cca84e2005-10-16 05:39:50 +0000466void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
Nate Begeman18f03292006-08-29 02:30:59 +0000467 EmitBranchToAt((intptr_t)Old, (intptr_t)New, false, is64Bit);
Jeffrey Yasskin3aa70b22010-01-14 23:15:26 +0000468 sys::Memory::InvalidateInstructionCache(Old, 7*4);
Chris Lattner8296c4c2004-11-23 06:02:06 +0000469}