Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 1 | //=== lib/CodeGen/GlobalISel/AArch64PreLegalizerCombiner.cpp --------------===// |
| 2 | // |
Chandler Carruth | 2946cd7 | 2019-01-19 08:50:56 +0000 | [diff] [blame] | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This pass does combining of machine instructions at the generic MI level, |
| 10 | // before the legalizer. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "AArch64TargetMachine.h" |
| 15 | #include "llvm/CodeGen/GlobalISel/Combiner.h" |
| 16 | #include "llvm/CodeGen/GlobalISel/CombinerHelper.h" |
| 17 | #include "llvm/CodeGen/GlobalISel/CombinerInfo.h" |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 18 | #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h" |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 19 | #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h" |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/MachineDominators.h" |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 21 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 22 | #include "llvm/CodeGen/TargetPassConfig.h" |
| 23 | #include "llvm/Support/Debug.h" |
| 24 | |
| 25 | #define DEBUG_TYPE "aarch64-prelegalizer-combiner" |
| 26 | |
| 27 | using namespace llvm; |
| 28 | using namespace MIPatternMatch; |
| 29 | |
Daniel Sanders | 505d7f3 | 2019-10-02 21:13:07 +0000 | [diff] [blame] | 30 | #define AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
| 31 | #include "AArch64GenGICombiner.inc" |
| 32 | #undef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS |
| 33 | |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 34 | namespace { |
Daniel Sanders | 505d7f3 | 2019-10-02 21:13:07 +0000 | [diff] [blame] | 35 | #define AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
| 36 | #include "AArch64GenGICombiner.inc" |
| 37 | #undef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H |
| 38 | |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 39 | class AArch64PreLegalizerCombinerInfo : public CombinerInfo { |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 40 | GISelKnownBits *KB; |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 41 | MachineDominatorTree *MDT; |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 42 | |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 43 | public: |
Daniel Sanders | 505d7f3 | 2019-10-02 21:13:07 +0000 | [diff] [blame] | 44 | AArch64GenPreLegalizerCombinerHelper Generated; |
| 45 | |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 46 | AArch64PreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 47 | GISelKnownBits *KB, MachineDominatorTree *MDT) |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 48 | : CombinerInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false, |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 49 | /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize), |
Daniel Sanders | 329e748 | 2019-10-17 00:37:04 +0000 | [diff] [blame] | 50 | KB(KB), MDT(MDT) { |
| 51 | if (!Generated.parseCommandLineOption()) |
| 52 | report_fatal_error("Invalid rule identifier"); |
| 53 | } |
| 54 | |
Aditya Nandakumar | f75d4f3 | 2018-12-05 20:14:52 +0000 | [diff] [blame] | 55 | virtual bool combine(GISelChangeObserver &Observer, MachineInstr &MI, |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 56 | MachineIRBuilder &B) const override; |
| 57 | }; |
| 58 | |
Aditya Nandakumar | f75d4f3 | 2018-12-05 20:14:52 +0000 | [diff] [blame] | 59 | bool AArch64PreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 60 | MachineInstr &MI, |
| 61 | MachineIRBuilder &B) const { |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 62 | CombinerHelper Helper(Observer, B, KB, MDT); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 63 | |
| 64 | switch (MI.getOpcode()) { |
Quentin Colombet | c319afc | 2019-10-17 00:34:32 +0000 | [diff] [blame] | 65 | case TargetOpcode::G_CONCAT_VECTORS: |
| 66 | return Helper.tryCombineConcatVectors(MI); |
Quentin Colombet | 6f0ae81 | 2019-10-21 20:39:58 +0000 | [diff] [blame] | 67 | case TargetOpcode::G_SHUFFLE_VECTOR: |
| 68 | return Helper.tryCombineShuffleVector(MI); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 69 | case TargetOpcode::G_LOAD: |
| 70 | case TargetOpcode::G_SEXTLOAD: |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 71 | case TargetOpcode::G_ZEXTLOAD: { |
| 72 | bool Changed = false; |
| 73 | Changed |= Helper.tryCombineExtendingLoads(MI); |
| 74 | Changed |= Helper.tryCombineIndexedLoadStore(MI); |
| 75 | return Changed; |
| 76 | } |
| 77 | case TargetOpcode::G_STORE: |
| 78 | return Helper.tryCombineIndexedLoadStore(MI); |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 79 | case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS: |
| 80 | switch (MI.getIntrinsicID()) { |
| 81 | case Intrinsic::memcpy: |
| 82 | case Intrinsic::memmove: |
| 83 | case Intrinsic::memset: { |
Amara Emerson | 85e5e28 | 2019-08-05 20:02:52 +0000 | [diff] [blame] | 84 | // If we're at -O0 set a maxlen of 32 to inline, otherwise let the other |
| 85 | // heuristics decide. |
| 86 | unsigned MaxLen = EnableOpt ? 0 : 32; |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 87 | // Try to inline memcpy type calls if optimizations are enabled. |
Amara Emerson | 7d62e48 | 2019-09-28 07:55:42 +0000 | [diff] [blame] | 88 | return (!EnableMinSize) ? Helper.tryCombineMemCpyFamily(MI, MaxLen) |
Amara Emerson | 85e5e28 | 2019-08-05 20:02:52 +0000 | [diff] [blame] | 89 | : false; |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 90 | } |
| 91 | default: |
| 92 | break; |
| 93 | } |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 94 | } |
| 95 | |
Daniel Sanders | 505d7f3 | 2019-10-02 21:13:07 +0000 | [diff] [blame] | 96 | if (Generated.tryCombineAll(Observer, MI, B)) |
| 97 | return true; |
| 98 | |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 99 | return false; |
| 100 | } |
| 101 | |
Daniel Sanders | 505d7f3 | 2019-10-02 21:13:07 +0000 | [diff] [blame] | 102 | #define AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |
| 103 | #include "AArch64GenGICombiner.inc" |
| 104 | #undef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP |
| 105 | |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 106 | // Pass boilerplate |
| 107 | // ================ |
| 108 | |
| 109 | class AArch64PreLegalizerCombiner : public MachineFunctionPass { |
| 110 | public: |
| 111 | static char ID; |
| 112 | |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 113 | AArch64PreLegalizerCombiner(bool IsOptNone = false); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 114 | |
| 115 | StringRef getPassName() const override { return "AArch64PreLegalizerCombiner"; } |
| 116 | |
| 117 | bool runOnMachineFunction(MachineFunction &MF) override; |
| 118 | |
| 119 | void getAnalysisUsage(AnalysisUsage &AU) const override; |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 120 | private: |
| 121 | bool IsOptNone; |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 122 | }; |
Daniel Sanders | ec5208f | 2019-10-16 23:53:35 +0000 | [diff] [blame] | 123 | } // end anonymous namespace |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 124 | |
| 125 | void AArch64PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const { |
| 126 | AU.addRequired<TargetPassConfig>(); |
| 127 | AU.setPreservesCFG(); |
| 128 | getSelectionDAGFallbackAnalysisUsage(AU); |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 129 | AU.addRequired<GISelKnownBitsAnalysis>(); |
| 130 | AU.addPreserved<GISelKnownBitsAnalysis>(); |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 131 | if (!IsOptNone) { |
| 132 | AU.addRequired<MachineDominatorTree>(); |
| 133 | AU.addPreserved<MachineDominatorTree>(); |
| 134 | } |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 135 | MachineFunctionPass::getAnalysisUsage(AU); |
| 136 | } |
| 137 | |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 138 | AArch64PreLegalizerCombiner::AArch64PreLegalizerCombiner(bool IsOptNone) |
| 139 | : MachineFunctionPass(ID), IsOptNone(IsOptNone) { |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 140 | initializeAArch64PreLegalizerCombinerPass(*PassRegistry::getPassRegistry()); |
| 141 | } |
| 142 | |
| 143 | bool AArch64PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) { |
| 144 | if (MF.getProperties().hasProperty( |
| 145 | MachineFunctionProperties::Property::FailedISel)) |
| 146 | return false; |
| 147 | auto *TPC = &getAnalysis<TargetPassConfig>(); |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 148 | const Function &F = MF.getFunction(); |
| 149 | bool EnableOpt = |
| 150 | MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F); |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 151 | GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF); |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 152 | MachineDominatorTree *MDT = |
| 153 | IsOptNone ? nullptr : &getAnalysis<MachineDominatorTree>(); |
Amara Emerson | 13af1ed | 2019-07-24 22:17:31 +0000 | [diff] [blame] | 154 | AArch64PreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 155 | F.hasMinSize(), KB, MDT); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 156 | Combiner C(PCInfo, TPC); |
Aditya Nandakumar | 500e3ea | 2019-01-16 00:40:37 +0000 | [diff] [blame] | 157 | return C.combineMachineInstrs(MF, /*CSEInfo*/ nullptr); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 158 | } |
| 159 | |
| 160 | char AArch64PreLegalizerCombiner::ID = 0; |
| 161 | INITIALIZE_PASS_BEGIN(AArch64PreLegalizerCombiner, DEBUG_TYPE, |
| 162 | "Combine AArch64 machine instrs before legalization", |
| 163 | false, false) |
| 164 | INITIALIZE_PASS_DEPENDENCY(TargetPassConfig) |
Aditya Nandakumar | c8ac029 | 2019-08-06 17:18:29 +0000 | [diff] [blame] | 165 | INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis) |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 166 | INITIALIZE_PASS_END(AArch64PreLegalizerCombiner, DEBUG_TYPE, |
| 167 | "Combine AArch64 machine instrs before legalization", false, |
| 168 | false) |
| 169 | |
| 170 | |
| 171 | namespace llvm { |
Tim Northover | 36147ad | 2019-09-09 10:04:23 +0000 | [diff] [blame] | 172 | FunctionPass *createAArch64PreLegalizeCombiner(bool IsOptNone) { |
| 173 | return new AArch64PreLegalizerCombiner(IsOptNone); |
Daniel Sanders | 34eac35 | 2018-10-03 02:21:30 +0000 | [diff] [blame] | 174 | } |
| 175 | } // end namespace llvm |