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Daniel Sanders34eac352018-10-03 02:21:30 +00001//=== lib/CodeGen/GlobalISel/AArch64PreLegalizerCombiner.cpp --------------===//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Daniel Sanders34eac352018-10-03 02:21:30 +00006//
7//===----------------------------------------------------------------------===//
8//
9// This pass does combining of machine instructions at the generic MI level,
10// before the legalizer.
11//
12//===----------------------------------------------------------------------===//
13
14#include "AArch64TargetMachine.h"
15#include "llvm/CodeGen/GlobalISel/Combiner.h"
16#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
17#include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +000018#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
Daniel Sanders34eac352018-10-03 02:21:30 +000019#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
Tim Northover36147ad2019-09-09 10:04:23 +000020#include "llvm/CodeGen/MachineDominators.h"
Daniel Sanders34eac352018-10-03 02:21:30 +000021#include "llvm/CodeGen/MachineFunctionPass.h"
22#include "llvm/CodeGen/TargetPassConfig.h"
23#include "llvm/Support/Debug.h"
24
25#define DEBUG_TYPE "aarch64-prelegalizer-combiner"
26
27using namespace llvm;
28using namespace MIPatternMatch;
29
Daniel Sanders505d7f32019-10-02 21:13:07 +000030#define AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
31#include "AArch64GenGICombiner.inc"
32#undef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
33
Daniel Sanders34eac352018-10-03 02:21:30 +000034namespace {
Daniel Sanders505d7f32019-10-02 21:13:07 +000035#define AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
36#include "AArch64GenGICombiner.inc"
37#undef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
38
Daniel Sanders34eac352018-10-03 02:21:30 +000039class AArch64PreLegalizerCombinerInfo : public CombinerInfo {
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +000040 GISelKnownBits *KB;
Tim Northover36147ad2019-09-09 10:04:23 +000041 MachineDominatorTree *MDT;
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +000042
Daniel Sanders34eac352018-10-03 02:21:30 +000043public:
Daniel Sanders505d7f32019-10-02 21:13:07 +000044 AArch64GenPreLegalizerCombinerHelper Generated;
45
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +000046 AArch64PreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize,
Tim Northover36147ad2019-09-09 10:04:23 +000047 GISelKnownBits *KB, MachineDominatorTree *MDT)
Daniel Sanders34eac352018-10-03 02:21:30 +000048 : CombinerInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +000049 /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize),
Daniel Sanders329e7482019-10-17 00:37:04 +000050 KB(KB), MDT(MDT) {
51 if (!Generated.parseCommandLineOption())
52 report_fatal_error("Invalid rule identifier");
53 }
54
Aditya Nandakumarf75d4f32018-12-05 20:14:52 +000055 virtual bool combine(GISelChangeObserver &Observer, MachineInstr &MI,
Daniel Sanders34eac352018-10-03 02:21:30 +000056 MachineIRBuilder &B) const override;
57};
58
Aditya Nandakumarf75d4f32018-12-05 20:14:52 +000059bool AArch64PreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer,
Daniel Sanders34eac352018-10-03 02:21:30 +000060 MachineInstr &MI,
61 MachineIRBuilder &B) const {
Tim Northover36147ad2019-09-09 10:04:23 +000062 CombinerHelper Helper(Observer, B, KB, MDT);
Daniel Sanders34eac352018-10-03 02:21:30 +000063
64 switch (MI.getOpcode()) {
Quentin Colombetc319afc2019-10-17 00:34:32 +000065 case TargetOpcode::G_CONCAT_VECTORS:
66 return Helper.tryCombineConcatVectors(MI);
Quentin Colombet6f0ae812019-10-21 20:39:58 +000067 case TargetOpcode::G_SHUFFLE_VECTOR:
68 return Helper.tryCombineShuffleVector(MI);
Daniel Sanders34eac352018-10-03 02:21:30 +000069 case TargetOpcode::G_LOAD:
70 case TargetOpcode::G_SEXTLOAD:
Tim Northover36147ad2019-09-09 10:04:23 +000071 case TargetOpcode::G_ZEXTLOAD: {
72 bool Changed = false;
73 Changed |= Helper.tryCombineExtendingLoads(MI);
74 Changed |= Helper.tryCombineIndexedLoadStore(MI);
75 return Changed;
76 }
77 case TargetOpcode::G_STORE:
78 return Helper.tryCombineIndexedLoadStore(MI);
Amara Emerson13af1ed2019-07-24 22:17:31 +000079 case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:
80 switch (MI.getIntrinsicID()) {
81 case Intrinsic::memcpy:
82 case Intrinsic::memmove:
83 case Intrinsic::memset: {
Amara Emerson85e5e282019-08-05 20:02:52 +000084 // If we're at -O0 set a maxlen of 32 to inline, otherwise let the other
85 // heuristics decide.
86 unsigned MaxLen = EnableOpt ? 0 : 32;
Amara Emerson13af1ed2019-07-24 22:17:31 +000087 // Try to inline memcpy type calls if optimizations are enabled.
Amara Emerson7d62e482019-09-28 07:55:42 +000088 return (!EnableMinSize) ? Helper.tryCombineMemCpyFamily(MI, MaxLen)
Amara Emerson85e5e282019-08-05 20:02:52 +000089 : false;
Amara Emerson13af1ed2019-07-24 22:17:31 +000090 }
91 default:
92 break;
93 }
Daniel Sanders34eac352018-10-03 02:21:30 +000094 }
95
Daniel Sanders505d7f32019-10-02 21:13:07 +000096 if (Generated.tryCombineAll(Observer, MI, B))
97 return true;
98
Daniel Sanders34eac352018-10-03 02:21:30 +000099 return false;
100}
101
Daniel Sanders505d7f32019-10-02 21:13:07 +0000102#define AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
103#include "AArch64GenGICombiner.inc"
104#undef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
105
Daniel Sanders34eac352018-10-03 02:21:30 +0000106// Pass boilerplate
107// ================
108
109class AArch64PreLegalizerCombiner : public MachineFunctionPass {
110public:
111 static char ID;
112
Tim Northover36147ad2019-09-09 10:04:23 +0000113 AArch64PreLegalizerCombiner(bool IsOptNone = false);
Daniel Sanders34eac352018-10-03 02:21:30 +0000114
115 StringRef getPassName() const override { return "AArch64PreLegalizerCombiner"; }
116
117 bool runOnMachineFunction(MachineFunction &MF) override;
118
119 void getAnalysisUsage(AnalysisUsage &AU) const override;
Tim Northover36147ad2019-09-09 10:04:23 +0000120private:
121 bool IsOptNone;
Daniel Sanders34eac352018-10-03 02:21:30 +0000122};
Daniel Sandersec5208f2019-10-16 23:53:35 +0000123} // end anonymous namespace
Daniel Sanders34eac352018-10-03 02:21:30 +0000124
125void AArch64PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
126 AU.addRequired<TargetPassConfig>();
127 AU.setPreservesCFG();
128 getSelectionDAGFallbackAnalysisUsage(AU);
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +0000129 AU.addRequired<GISelKnownBitsAnalysis>();
130 AU.addPreserved<GISelKnownBitsAnalysis>();
Tim Northover36147ad2019-09-09 10:04:23 +0000131 if (!IsOptNone) {
132 AU.addRequired<MachineDominatorTree>();
133 AU.addPreserved<MachineDominatorTree>();
134 }
Daniel Sanders34eac352018-10-03 02:21:30 +0000135 MachineFunctionPass::getAnalysisUsage(AU);
136}
137
Tim Northover36147ad2019-09-09 10:04:23 +0000138AArch64PreLegalizerCombiner::AArch64PreLegalizerCombiner(bool IsOptNone)
139 : MachineFunctionPass(ID), IsOptNone(IsOptNone) {
Daniel Sanders34eac352018-10-03 02:21:30 +0000140 initializeAArch64PreLegalizerCombinerPass(*PassRegistry::getPassRegistry());
141}
142
143bool AArch64PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
144 if (MF.getProperties().hasProperty(
145 MachineFunctionProperties::Property::FailedISel))
146 return false;
147 auto *TPC = &getAnalysis<TargetPassConfig>();
Amara Emerson13af1ed2019-07-24 22:17:31 +0000148 const Function &F = MF.getFunction();
149 bool EnableOpt =
150 MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F);
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +0000151 GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
Tim Northover36147ad2019-09-09 10:04:23 +0000152 MachineDominatorTree *MDT =
153 IsOptNone ? nullptr : &getAnalysis<MachineDominatorTree>();
Amara Emerson13af1ed2019-07-24 22:17:31 +0000154 AArch64PreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(),
Tim Northover36147ad2019-09-09 10:04:23 +0000155 F.hasMinSize(), KB, MDT);
Daniel Sanders34eac352018-10-03 02:21:30 +0000156 Combiner C(PCInfo, TPC);
Aditya Nandakumar500e3ea2019-01-16 00:40:37 +0000157 return C.combineMachineInstrs(MF, /*CSEInfo*/ nullptr);
Daniel Sanders34eac352018-10-03 02:21:30 +0000158}
159
160char AArch64PreLegalizerCombiner::ID = 0;
161INITIALIZE_PASS_BEGIN(AArch64PreLegalizerCombiner, DEBUG_TYPE,
162 "Combine AArch64 machine instrs before legalization",
163 false, false)
164INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
Aditya Nandakumarc8ac0292019-08-06 17:18:29 +0000165INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis)
Daniel Sanders34eac352018-10-03 02:21:30 +0000166INITIALIZE_PASS_END(AArch64PreLegalizerCombiner, DEBUG_TYPE,
167 "Combine AArch64 machine instrs before legalization", false,
168 false)
169
170
171namespace llvm {
Tim Northover36147ad2019-09-09 10:04:23 +0000172FunctionPass *createAArch64PreLegalizeCombiner(bool IsOptNone) {
173 return new AArch64PreLegalizerCombiner(IsOptNone);
Daniel Sanders34eac352018-10-03 02:21:30 +0000174}
175} // end namespace llvm