blob: 64c798c227144068a8536abb7909ab03f278322d [file] [log] [blame]
Jia Liub22310f2012-02-18 12:03:15 +00001//===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
Nate Begeman3bcfcd92005-08-04 07:12:09 +00002//
3// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Nate Begeman3bcfcd92005-08-04 07:12:09 +00007//
8//===----------------------------------------------------------------------===//
9//
Evan Cheng0d639a22011-07-01 21:01:15 +000010// This file implements the PPC specific subclass of TargetSubtargetInfo.
Nate Begeman3bcfcd92005-08-04 07:12:09 +000011//
12//===----------------------------------------------------------------------===//
13
Chris Lattnerbfca1ab2005-10-14 23:51:18 +000014#include "PPCSubtarget.h"
15#include "PPC.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000016#include "PPCRegisterInfo.h"
Hal Finkela0014a52013-07-15 22:29:40 +000017#include "llvm/CodeGen/MachineFunction.h"
Hal Finkel21442b22013-09-11 23:05:25 +000018#include "llvm/CodeGen/MachineScheduler.h"
Hal Finkela0014a52013-07-15 22:29:40 +000019#include "llvm/IR/Attributes.h"
Hal Finkela0014a52013-07-15 22:29:40 +000020#include "llvm/IR/Function.h"
Chandler Carruth8a8cd2b2014-01-07 11:48:04 +000021#include "llvm/IR/GlobalValue.h"
Hal Finkel59b0ee82012-06-12 03:03:13 +000022#include "llvm/Support/Host.h"
Evan Cheng2bb40352011-08-24 18:08:43 +000023#include "llvm/Support/TargetRegistry.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000024#include "llvm/Target/TargetMachine.h"
Dan Gohman906152a2009-01-05 17:59:02 +000025#include <cstdlib>
Evan Cheng54b68e32011-07-01 20:45:01 +000026
Chandler Carruthd174b722014-04-22 02:03:14 +000027using namespace llvm;
28
Chandler Carruthe96dd892014-04-21 22:55:11 +000029#define DEBUG_TYPE "ppc-subtarget"
30
Evan Cheng54b68e32011-07-01 20:45:01 +000031#define GET_SUBTARGETINFO_TARGET_DESC
Evan Cheng4d1ca962011-07-08 01:53:10 +000032#define GET_SUBTARGETINFO_CTOR
Evan Chengc9c090d2011-07-01 22:36:09 +000033#include "PPCGenSubtargetInfo.inc"
Evan Cheng54b68e32011-07-01 20:45:01 +000034
Eric Christopher49628bc2014-06-12 21:08:06 +000035/// Return the datalayout string of a subtarget.
Eric Christopher0ead61c2014-08-09 04:53:17 +000036static std::string getDataLayoutString(const Triple &T) {
37 bool is64Bit = T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le;
Eric Christopher49628bc2014-06-12 21:08:06 +000038 std::string Ret;
39
40 // Most PPC* platforms are big endian, PPC64LE is little endian.
Eric Christopher0ead61c2014-08-09 04:53:17 +000041 if (T.getArch() == Triple::ppc64le)
Eric Christopher49628bc2014-06-12 21:08:06 +000042 Ret = "e";
43 else
44 Ret = "E";
45
46 Ret += DataLayout::getManglingComponent(T);
47
48 // PPC32 has 32 bit pointers. The PS3 (OS Lv2) is a PPC64 machine with 32 bit
49 // pointers.
Eric Christopher0ead61c2014-08-09 04:53:17 +000050 if (!is64Bit || T.getOS() == Triple::Lv2)
Eric Christopher49628bc2014-06-12 21:08:06 +000051 Ret += "-p:32:32";
52
53 // Note, the alignment values for f64 and i64 on ppc64 in Darwin
54 // documentation are wrong; these are correct (i.e. "what gcc does").
Eric Christopher0ead61c2014-08-09 04:53:17 +000055 if (is64Bit || !T.isOSDarwin())
Eric Christopher49628bc2014-06-12 21:08:06 +000056 Ret += "-i64:64";
57 else
58 Ret += "-f64:32:64";
59
60 // PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
Eric Christopher0ead61c2014-08-09 04:53:17 +000061 if (is64Bit)
Eric Christopher49628bc2014-06-12 21:08:06 +000062 Ret += "-n32:64";
63 else
64 Ret += "-n32";
65
66 return Ret;
67}
68
Eric Christopherd104c312014-06-12 20:54:11 +000069PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
70 StringRef FS) {
71 initializeEnvironment();
Eric Christopherb68e2532014-09-03 20:36:31 +000072 initSubtargetFeatures(CPU, FS);
Eric Christopherd104c312014-06-12 20:54:11 +000073 return *this;
74}
75
Evan Chengfe6e4052011-06-30 01:53:36 +000076PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
Eric Christopherf8c031f2014-06-12 22:50:10 +000077 const std::string &FS, PPCTargetMachine &TM,
Eric Christopher3770cf52014-08-09 04:38:56 +000078 CodeGenOpt::Level OptLevel)
79 : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
Eric Christopher0ead61c2014-08-09 04:53:17 +000080 DL(getDataLayoutString(TargetTriple)),
Eric Christopher3770cf52014-08-09 04:38:56 +000081 IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
82 TargetTriple.getArch() == Triple::ppc64le),
Ulrich Weigand90a5de82014-07-28 13:09:28 +000083 OptLevel(OptLevel), TargetABI(PPC_ABI_UNKNOWN),
Eric Christopher0ead61c2014-08-09 04:53:17 +000084 FrameLowering(initializeSubtargetDependencies(CPU, FS)), InstrInfo(*this),
Eric Christopher79cc1e32014-09-02 22:28:02 +000085 TLInfo(TM), TSInfo(&DL) {}
Eric Christopherb9fd9ed2014-08-07 22:02:54 +000086
Hal Finkela0014a52013-07-15 22:29:40 +000087void PPCSubtarget::initializeEnvironment() {
88 StackAlignment = 16;
89 DarwinDirective = PPC::DIR_NONE;
90 HasMFOCRF = false;
91 Has64BitSupport = false;
92 Use64BitRegs = false;
Hal Finkel940ab932014-02-28 00:27:01 +000093 UseCRBits = false;
Hal Finkela0014a52013-07-15 22:29:40 +000094 HasAltivec = false;
Joerg Sonnenberger39f095a2014-08-07 12:18:21 +000095 HasSPE = false;
Hal Finkela0014a52013-07-15 22:29:40 +000096 HasQPX = false;
Hal Finkel27774d92014-03-13 07:58:58 +000097 HasVSX = false;
Hal Finkeldbc78e12013-08-19 05:01:02 +000098 HasFCPSGN = false;
Hal Finkela0014a52013-07-15 22:29:40 +000099 HasFSQRT = false;
100 HasFRE = false;
101 HasFRES = false;
102 HasFRSQRTE = false;
103 HasFRSQRTES = false;
104 HasRecipPrec = false;
105 HasSTFIWX = false;
106 HasLFIWAX = false;
107 HasFPRND = false;
108 HasFPCVT = false;
109 HasISEL = false;
110 HasPOPCNTD = false;
111 HasLDBRX = false;
112 IsBookE = false;
Joerg Sonnenberger0b2ebcb2014-08-04 15:47:38 +0000113 IsPPC4xx = false;
Joerg Sonnenberger74052102014-08-04 17:07:41 +0000114 IsPPC6xx = false;
Joerg Sonnenberger0b2ebcb2014-08-04 15:47:38 +0000115 IsE500 = false;
Hal Finkel0096dbd2013-09-12 14:40:06 +0000116 DeprecatedMFTB = false;
117 DeprecatedDST = false;
Hal Finkela0014a52013-07-15 22:29:40 +0000118 HasLazyResolverStubs = false;
Hal Finkela0014a52013-07-15 22:29:40 +0000119}
120
Eric Christopherb68e2532014-09-03 20:36:31 +0000121void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
Jim Laskey19058c32005-09-01 21:38:21 +0000122 // Determine default and user specified characteristics
Evan Chengfe6e4052011-06-30 01:53:36 +0000123 std::string CPUName = CPU;
124 if (CPUName.empty())
125 CPUName = "generic";
Hal Finkel59b0ee82012-06-12 03:03:13 +0000126#if (defined(__APPLE__) || defined(__linux__)) && \
127 (defined(__ppc__) || defined(__powerpc__))
Evan Chengfe6e4052011-06-30 01:53:36 +0000128 if (CPUName == "generic")
Hal Finkel59b0ee82012-06-12 03:03:13 +0000129 CPUName = sys::getHostCPUName();
Jim Laskey19058c32005-09-01 21:38:21 +0000130#endif
Jim Laskeya2b52352005-10-26 17:30:34 +0000131
Evan Cheng54b68e32011-07-01 20:45:01 +0000132 // Initialize scheduling itinerary for the specified CPU.
133 InstrItins = getInstrItineraryForCPU(CPUName);
134
Adhemerval Zanellaf2aceda2012-10-25 12:27:42 +0000135 // Make sure 64-bit features are available when CPUname is generic
136 std::string FullFS = FS;
137
Chris Lattner16682ff2006-06-16 17:50:12 +0000138 // If we are generating code for ppc64, verify that options make sense.
Hal Finkela0014a52013-07-15 22:29:40 +0000139 if (IsPPC64) {
Dale Johannesen2e019122008-02-15 18:40:53 +0000140 Has64BitSupport = true;
Chris Lattner61d70312006-06-16 20:05:06 +0000141 // Silently force 64-bit register use on ppc64.
142 Use64BitRegs = true;
Adhemerval Zanellaf2aceda2012-10-25 12:27:42 +0000143 if (!FullFS.empty())
144 FullFS = "+64bit," + FullFS;
145 else
146 FullFS = "+64bit";
Chris Lattner16682ff2006-06-16 17:50:12 +0000147 }
Will Schmidt2247f8a2012-10-04 16:20:24 +0000148
Eric Christopherd1309ee2014-05-13 20:49:08 +0000149 // At -O2 and above, track CR bits as individual registers.
150 if (OptLevel >= CodeGenOpt::Default) {
151 if (!FullFS.empty())
152 FullFS = "+crbits," + FullFS;
153 else
154 FullFS = "+crbits";
155 }
156
Adhemerval Zanellaf2aceda2012-10-25 12:27:42 +0000157 // Parse features string.
158 ParseSubtargetFeatures(CPUName, FullFS);
159
Chris Lattner16682ff2006-06-16 17:50:12 +0000160 // If the user requested use of 64-bit regs, but the cpu selected doesn't
Dale Johannesen2e019122008-02-15 18:40:53 +0000161 // support it, ignore.
162 if (use64BitRegs() && !has64BitSupport())
Chris Lattner16682ff2006-06-16 17:50:12 +0000163 Use64BitRegs = false;
Chris Lattnerf4646a72006-12-11 23:22:45 +0000164
165 // Set up darwin-specific properties.
Chris Lattnere6555212009-08-11 22:49:34 +0000166 if (isDarwin())
Chris Lattnerf4646a72006-12-11 23:22:45 +0000167 HasLazyResolverStubs = true;
Hal Finkele1df9092013-01-30 23:43:27 +0000168
169 // QPX requires a 32-byte aligned stack. Note that we need to do this if
170 // we're compiling for a BG/Q system regardless of whether or not QPX
171 // is enabled because external functions will assume this alignment.
172 if (hasQPX() || isBGQ())
173 StackAlignment = 32;
Bill Schmidt0a9170d2013-07-26 01:35:43 +0000174
175 // Determine endianness.
176 IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
Bill Schmidt82f9e8a2014-06-05 16:21:13 +0000177
178 // FIXME: For now, we disable VSX in little-endian mode until endian
179 // issues in those instructions can be addressed.
180 if (IsLittleEndian)
181 HasVSX = false;
Ulrich Weigand90a5de82014-07-28 13:09:28 +0000182
183 // Determine default ABI.
184 if (TargetABI == PPC_ABI_UNKNOWN) {
185 if (!isDarwin() && IsPPC64) {
186 if (IsLittleEndian)
187 TargetABI = PPC_ABI_ELFv2;
188 else
189 TargetABI = PPC_ABI_ELFv1;
190 }
191 }
Chris Lattnerf4646a72006-12-11 23:22:45 +0000192}
193
Chris Lattnerf4646a72006-12-11 23:22:45 +0000194/// hasLazyResolverStub - Return true if accesses to the specified global have
195/// to go through a dyld lazy resolution stub. This means that an extra load
196/// is required to get the address of the global.
Daniel Dunbar31b44e82009-08-02 22:11:08 +0000197bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV,
198 const TargetMachine &TM) const {
Chris Lattneredb9d842010-11-15 02:46:57 +0000199 // We never have stubs if HasLazyResolverStubs=false or if in static mode.
Chris Lattnerf4646a72006-12-11 23:22:45 +0000200 if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
201 return false;
Evan Cheng2a03c7e2008-12-05 01:06:39 +0000202 // If symbol visibility is hidden, the extra load is not needed if
203 // the symbol is definitely defined in the current translation unit.
Jeffrey Yasskin091217b2010-01-27 20:34:15 +0000204 bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
Evan Cheng2a03c7e2008-12-05 01:06:39 +0000205 if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
206 return false;
Chris Lattnerf4646a72006-12-11 23:22:45 +0000207 return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
Evan Cheng2a03c7e2008-12-05 01:06:39 +0000208 GV->hasCommonLinkage() || isDecl;
Nate Begeman3bcfcd92005-08-04 07:12:09 +0000209}
Hal Finkel58ca3602011-12-02 04:58:02 +0000210
Hal Finkel42daeae2013-11-30 20:55:12 +0000211// Embedded cores need aggressive scheduling (and some others also benefit).
Hal Finkel21442b22013-09-11 23:05:25 +0000212static bool needsAggressiveScheduling(unsigned Directive) {
213 switch (Directive) {
214 default: return false;
215 case PPC::DIR_440:
216 case PPC::DIR_A2:
217 case PPC::DIR_E500mc:
218 case PPC::DIR_E5500:
Hal Finkel42daeae2013-11-30 20:55:12 +0000219 case PPC::DIR_PWR7:
Will Schmidt970ff642014-06-26 13:36:19 +0000220 case PPC::DIR_PWR8:
Hal Finkel21442b22013-09-11 23:05:25 +0000221 return true;
222 }
223}
224
225bool PPCSubtarget::enableMachineScheduler() const {
226 // Enable MI scheduling for the embedded cores.
227 // FIXME: Enable this for all cores (some additional modeling
228 // may be necessary).
229 return needsAggressiveScheduling(DarwinDirective);
230}
231
Sanjay Patela2f658d2014-07-15 22:39:58 +0000232// This overrides the PostRAScheduler bit in the SchedModel for each CPU.
233bool PPCSubtarget::enablePostMachineScheduler() const { return true; }
234
235PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
236 return TargetSubtargetInfo::ANTIDEP_ALL;
237}
238
239void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
240 CriticalPathRCs.clear();
241 CriticalPathRCs.push_back(isPPC64() ?
242 &PPC::G8RCRegClass : &PPC::GPRCRegClass);
243}
244
Hal Finkel21442b22013-09-11 23:05:25 +0000245void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
246 MachineInstr *begin,
247 MachineInstr *end,
248 unsigned NumRegionInstrs) const {
249 if (needsAggressiveScheduling(DarwinDirective)) {
250 Policy.OnlyTopDown = false;
251 Policy.OnlyBottomUp = false;
252 }
253
254 // Spilling is generally expensive on all PPC cores, so always enable
255 // register-pressure tracking.
256 Policy.ShouldTrackPressure = true;
257}
258
259bool PPCSubtarget::useAA() const {
260 // Use AA during code generation for the embedded cores.
261 return needsAggressiveScheduling(DarwinDirective);
262}
263