Matt Arsenault | dc4ebad | 2016-04-29 21:16:52 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=HSA -check-prefix=ALL %s |
| 2 | ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -verify-machineinstrs < %s | FileCheck -check-prefix=MESA -check-prefix=ALL %s |
| 3 | |
| 4 | ; ALL-LABEL: {{^}}test: |
| 5 | ; HSA: enable_sgpr_kernarg_segment_ptr = 1 |
| 6 | ; HSA: s_load_dword s{{[0-9]+}}, s[4:5], 0xa |
| 7 | |
| 8 | ; MESA: s_load_dword s{{[0-9]+}}, s[0:1], 0xa |
| 9 | define void @test(i32 addrspace(1)* %out) #1 { |
| 10 | %kernarg.segment.ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() |
| 11 | %header.ptr = bitcast i8 addrspace(2)* %kernarg.segment.ptr to i32 addrspace(2)* |
| 12 | %gep = getelementptr i32, i32 addrspace(2)* %header.ptr, i64 10 |
| 13 | %value = load i32, i32 addrspace(2)* %gep |
| 14 | store i32 %value, i32 addrspace(1)* %out |
| 15 | ret void |
| 16 | } |
| 17 | |
Jan Vesely | fea814d | 2016-06-21 20:46:20 +0000 | [diff] [blame] | 18 | ; ALL-LABEL: {{^}}test_implicit: |
| 19 | ; 10 + 9 (36 prepended implicit bytes) + 2(out pointer) = 21 = 0x15 |
| 20 | ; MESA: s_load_dword s{{[0-9]+}}, s[0:1], 0x15 |
| 21 | define void @test_implicit(i32 addrspace(1)* %out) #1 { |
| 22 | %implicitarg.ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() |
| 23 | %header.ptr = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)* |
| 24 | %gep = getelementptr i32, i32 addrspace(2)* %header.ptr, i64 10 |
| 25 | %value = load i32, i32 addrspace(2)* %gep |
| 26 | store i32 %value, i32 addrspace(1)* %out |
| 27 | ret void |
| 28 | } |
| 29 | |
Tom Stellard | ba57308 | 2016-08-31 18:46:07 +0000 | [diff] [blame] | 30 | ; ALL-LABEL: {{^}}test_implicit_alignment |
| 31 | ; MESA: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xc |
Tom Stellard | b2869eb | 2016-09-09 19:28:00 +0000 | [diff] [blame] | 32 | ; HSA: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x4 |
Tom Stellard | ba57308 | 2016-08-31 18:46:07 +0000 | [diff] [blame] | 33 | ; ALL: v_mov_b32_e32 [[V_VAL:v[0-9]+]], [[VAL]] |
| 34 | ; MESA: buffer_store_dword [[V_VAL]] |
| 35 | ; HSA: flat_store_dword v[{{[0-9]+:[0-9]+}}], [[V_VAL]] |
| 36 | define void @test_implicit_alignment(i32 addrspace(1)* %out, <2 x i8> %in) #1 { |
| 37 | %implicitarg.ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() |
| 38 | %arg.ptr = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)* |
| 39 | %val = load i32, i32 addrspace(2)* %arg.ptr |
| 40 | store i32 %val, i32 addrspace(1)* %out |
| 41 | ret void |
| 42 | } |
| 43 | |
Matt Arsenault | dc4ebad | 2016-04-29 21:16:52 +0000 | [diff] [blame] | 44 | declare i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() #0 |
Jan Vesely | fea814d | 2016-06-21 20:46:20 +0000 | [diff] [blame] | 45 | declare i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() #0 |
Matt Arsenault | dc4ebad | 2016-04-29 21:16:52 +0000 | [diff] [blame] | 46 | |
| 47 | attributes #0 = { nounwind readnone } |
| 48 | attributes #1 = { nounwind } |