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gerrit-public.fairphone.software / toolchain / llvm-project / 0d23ebe8883af4b280897af751614c7b433e00f7 / . / llvm / test / CodeGen / AMDGPU / fceil64.ll
blob: 7d351d5a348d8006c584a7dd3ef28ff0404fa40e [file] [log] [blame]
Matt Arsenault79003342016-04-14 21:58:07 +0000[diff] [blame]1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Marek Olsakfa6607d2015-02-11 14:26:46 +0000[diff] [blame]2; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
3; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
Jan Vesely85f0dbc2014-06-18 17:57:29 +0000[diff] [blame]4
5declare double @llvm.ceil.f64(double) nounwind readnone
6declare <2 x double> @llvm.ceil.v2f64(<2 x double>) nounwind readnone
7declare <3 x double> @llvm.ceil.v3f64(<3 x double>) nounwind readnone
8declare <4 x double> @llvm.ceil.v4f64(<4 x double>) nounwind readnone
9declare <8 x double> @llvm.ceil.v8f64(<8 x double>) nounwind readnone
10declare <16 x double> @llvm.ceil.v16f64(<16 x double>) nounwind readnone
11
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]12; FUNC-LABEL: {{^}}fceil_f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]13; CI: v_ceil_f64_e32
14; SI: s_bfe_u32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
Tom Stellard1d5e6d42016-03-30 16:35:13 +0000[diff] [blame]15; SI-DAG: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000
Tom Stellard0d23ebe2016-08-29 19:42:52 +0000[diff] [blame^]16; FIXME: We should be using s_addk_i32 here, but the reg allocation hints
17; are not always followed.
18; SI-DAG: s_add_i32 [[SEXP0:s[0-9]+]], [[SEXP]], 0xfffffc01
19; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP0]]
Tom Stellard1d5e6d42016-03-30 16:35:13 +0000[diff] [blame]20; SI-DAG: s_not_b64
21; SI-DAG: s_and_b64
Matt Arsenault61dc2352015-10-12 23:59:50 +0000[diff] [blame]22; SI-DAG: cmp_gt_i32
23; SI-DAG: cndmask_b32
24; SI-DAG: cndmask_b32
25; SI-DAG: cmp_lt_i32
26; SI-DAG: cndmask_b32
27; SI-DAG: cndmask_b32
Matt Arsenaultf5b2cd82015-03-23 18:45:30 +0000[diff] [blame]28; SI-DAG: v_cmp_lt_f64
Matt Arsenault8a9e4042015-02-13 19:04:56 +0000[diff] [blame]29; SI-DAG: v_cmp_lg_f64
Artem Tamazov13548772016-06-06 15:23:43 +0000[diff] [blame]30; SI-DAG: v_cndmask_b32
Matt Arsenaultbecd6562014-12-03 05:22:35 +0000[diff] [blame]31; SI: v_cndmask_b32
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]32; SI: v_add_f64
Matt Arsenaultbecd6562014-12-03 05:22:35 +0000[diff] [blame]33; SI: s_endpgm
Jan Vesely85f0dbc2014-06-18 17:57:29 +0000[diff] [blame]34define void @fceil_f64(double addrspace(1)* %out, double %x) {
35 %y = call double @llvm.ceil.f64(double %x) nounwind readnone
36 store double %y, double addrspace(1)* %out
37 ret void
38}
39
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]40; FUNC-LABEL: {{^}}fceil_v2f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]41; CI: v_ceil_f64_e32
42; CI: v_ceil_f64_e32
Jan Vesely85f0dbc2014-06-18 17:57:29 +0000[diff] [blame]43define void @fceil_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %x) {
44 %y = call <2 x double> @llvm.ceil.v2f64(<2 x double> %x) nounwind readnone
45 store <2 x double> %y, <2 x double> addrspace(1)* %out
46 ret void
47}
48
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]49; FIXME-FUNC-LABEL: {{^}}fceil_v3f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]50; FIXME-CI: v_ceil_f64_e32
51; FIXME-CI: v_ceil_f64_e32
52; FIXME-CI: v_ceil_f64_e32
Jan Vesely85f0dbc2014-06-18 17:57:29 +0000[diff] [blame]53; define void @fceil_v3f64(<3 x double> addrspace(1)* %out, <3 x double> %x) {
54; %y = call <3 x double> @llvm.ceil.v3f64(<3 x double> %x) nounwind readnone
55; store <3 x double> %y, <3 x double> addrspace(1)* %out
56; ret void
57; }
58
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]59; FUNC-LABEL: {{^}}fceil_v4f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]60; CI: v_ceil_f64_e32
61; CI: v_ceil_f64_e32
62; CI: v_ceil_f64_e32
63; CI: v_ceil_f64_e32
Jan Vesely85f0dbc2014-06-18 17:57:29 +0000[diff] [blame]64define void @fceil_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %x) {
65 %y = call <4 x double> @llvm.ceil.v4f64(<4 x double> %x) nounwind readnone
66 store <4 x double> %y, <4 x double> addrspace(1)* %out
67 ret void
68}
69
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]70; FUNC-LABEL: {{^}}fceil_v8f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]71; CI: v_ceil_f64_e32
72; CI: v_ceil_f64_e32
73; CI: v_ceil_f64_e32
74; CI: v_ceil_f64_e32
75; CI: v_ceil_f64_e32
76; CI: v_ceil_f64_e32
77; CI: v_ceil_f64_e32
78; CI: v_ceil_f64_e32
Jan Vesely85f0dbc2014-06-18 17:57:29 +0000[diff] [blame]79define void @fceil_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %x) {
80 %y = call <8 x double> @llvm.ceil.v8f64(<8 x double> %x) nounwind readnone
81 store <8 x double> %y, <8 x double> addrspace(1)* %out
82 ret void
83}
84
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]85; FUNC-LABEL: {{^}}fceil_v16f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]86; CI: v_ceil_f64_e32
87; CI: v_ceil_f64_e32
88; CI: v_ceil_f64_e32
89; CI: v_ceil_f64_e32
90; CI: v_ceil_f64_e32
91; CI: v_ceil_f64_e32
92; CI: v_ceil_f64_e32
93; CI: v_ceil_f64_e32
94; CI: v_ceil_f64_e32
95; CI: v_ceil_f64_e32
96; CI: v_ceil_f64_e32
97; CI: v_ceil_f64_e32
98; CI: v_ceil_f64_e32
99; CI: v_ceil_f64_e32
100; CI: v_ceil_f64_e32
101; CI: v_ceil_f64_e32
Jan Vesely85f0dbc2014-06-18 17:57:29 +0000[diff] [blame]102define void @fceil_v16f64(<16 x double> addrspace(1)* %out, <16 x double> %x) {
103 %y = call <16 x double> @llvm.ceil.v16f64(<16 x double> %x) nounwind readnone
104 store <16 x double> %y, <16 x double> addrspace(1)* %out
105 ret void
106}