| Tim Northover | 1ff5f29 | 2014-03-26 14:39:31 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -mtriple=armv8-apple-darwin | FileCheck %s |
| 2 | ; RUN: llc < %s -mtriple=thumbv8-apple-darwin | FileCheck %s |
| 3 | |
| 4 | %0 = type { i32, i32 } |
| 5 | |
| 6 | ; CHECK-LABEL: f0: |
| 7 | ; CHECK: ldaexd |
| 8 | define i64 @f0(i8* %p) nounwind readonly { |
| 9 | entry: |
| 10 | %ldaexd = tail call %0 @llvm.arm.ldaexd(i8* %p) |
| 11 | %0 = extractvalue %0 %ldaexd, 1 |
| 12 | %1 = extractvalue %0 %ldaexd, 0 |
| 13 | %2 = zext i32 %0 to i64 |
| 14 | %3 = zext i32 %1 to i64 |
| 15 | %shl = shl nuw i64 %2, 32 |
| 16 | %4 = or i64 %shl, %3 |
| 17 | ret i64 %4 |
| 18 | } |
| 19 | |
| 20 | ; CHECK-LABEL: f1: |
| 21 | ; CHECK: stlexd |
| 22 | define i32 @f1(i8* %ptr, i64 %val) nounwind { |
| 23 | entry: |
| 24 | %tmp4 = trunc i64 %val to i32 |
| 25 | %tmp6 = lshr i64 %val, 32 |
| 26 | %tmp7 = trunc i64 %tmp6 to i32 |
| 27 | %stlexd = tail call i32 @llvm.arm.stlexd(i32 %tmp4, i32 %tmp7, i8* %ptr) |
| 28 | ret i32 %stlexd |
| 29 | } |
| 30 | |
| 31 | declare %0 @llvm.arm.ldaexd(i8*) nounwind readonly |
| 32 | declare i32 @llvm.arm.stlexd(i32, i32, i8*) nounwind |
| 33 | |
| 34 | ; CHECK-LABEL: test_load_i8: |
| 35 | ; CHECK: ldaexb r0, [r0] |
| 36 | ; CHECK-NOT: uxtb |
| 37 | define i32 @test_load_i8(i8* %addr) { |
| 38 | %val = call i32 @llvm.arm.ldaex.p0i8(i8* %addr) |
| 39 | ret i32 %val |
| 40 | } |
| 41 | |
| 42 | ; CHECK-LABEL: test_load_i16: |
| 43 | ; CHECK: ldaexh r0, [r0] |
| 44 | ; CHECK-NOT: uxth |
| 45 | define i32 @test_load_i16(i16* %addr) { |
| 46 | %val = call i32 @llvm.arm.ldaex.p0i16(i16* %addr) |
| 47 | ret i32 %val |
| 48 | } |
| 49 | |
| 50 | ; CHECK-LABEL: test_load_i32: |
| 51 | ; CHECK: ldaex r0, [r0] |
| 52 | define i32 @test_load_i32(i32* %addr) { |
| 53 | %val = call i32 @llvm.arm.ldaex.p0i32(i32* %addr) |
| 54 | ret i32 %val |
| 55 | } |
| 56 | |
| 57 | declare i32 @llvm.arm.ldaex.p0i8(i8*) nounwind readonly |
| 58 | declare i32 @llvm.arm.ldaex.p0i16(i16*) nounwind readonly |
| 59 | declare i32 @llvm.arm.ldaex.p0i32(i32*) nounwind readonly |
| 60 | |
| 61 | ; CHECK-LABEL: test_store_i8: |
| 62 | ; CHECK-NOT: uxtb |
| 63 | ; CHECK: stlexb r0, r1, [r2] |
| 64 | define i32 @test_store_i8(i32, i8 %val, i8* %addr) { |
| 65 | %extval = zext i8 %val to i32 |
| 66 | %res = call i32 @llvm.arm.stlex.p0i8(i32 %extval, i8* %addr) |
| 67 | ret i32 %res |
| 68 | } |
| 69 | |
| 70 | ; CHECK-LABEL: test_store_i16: |
| 71 | ; CHECK-NOT: uxth |
| 72 | ; CHECK: stlexh r0, r1, [r2] |
| 73 | define i32 @test_store_i16(i32, i16 %val, i16* %addr) { |
| 74 | %extval = zext i16 %val to i32 |
| 75 | %res = call i32 @llvm.arm.stlex.p0i16(i32 %extval, i16* %addr) |
| 76 | ret i32 %res |
| 77 | } |
| 78 | |
| 79 | ; CHECK-LABEL: test_store_i32: |
| 80 | ; CHECK: stlex r0, r1, [r2] |
| 81 | define i32 @test_store_i32(i32, i32 %val, i32* %addr) { |
| 82 | %res = call i32 @llvm.arm.stlex.p0i32(i32 %val, i32* %addr) |
| 83 | ret i32 %res |
| 84 | } |
| 85 | |
| 86 | declare i32 @llvm.arm.stlex.p0i8(i32, i8*) nounwind |
| 87 | declare i32 @llvm.arm.stlex.p0i16(i32, i16*) nounwind |
| 88 | declare i32 @llvm.arm.stlex.p0i32(i32, i32*) nounwind |