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gerrit-public.fairphone.software / toolchain / llvm-project / 0fd6e9608e3730f2d99255786af22e46d975af9b / . / llvm / lib / Target / AMDGPU / InstPrinter / AMDGPUInstPrinter.h
blob: 53b1966dfe07dd199f15648888331273dac55dd4 [file] [log] [blame]
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]1//===-- AMDGPUInstPrinter.h - AMDGPU MC Inst -> ASM interface ---*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11//===----------------------------------------------------------------------===//
12
Matt Arsenault6b6a2c32016-03-11 08:00:27 +0000[diff] [blame]13#ifndef LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
14#define LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]15
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]16#include "llvm/MC/MCInstPrinter.h"
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]17
18namespace llvm {
19
20class AMDGPUInstPrinter : public MCInstPrinter {
21public:
22 AMDGPUInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
23 const MCRegisterInfo &MRI)
24 : MCInstPrinter(MAI, MII, MRI) {}
25
26 //Autogenerated by tblgen
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]27 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
28 raw_ostream &O);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]29 static const char *getRegisterName(unsigned RegNo);
30
Akira Hatanakab46d0232015-03-27 20:36:02 +0000[diff] [blame]31 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
32 const MCSubtargetInfo &STI) override;
Tom Stellardd7e6f132015-04-08 01:09:26 +0000[diff] [blame]33 static void printRegOperand(unsigned RegNo, raw_ostream &O,
34 const MCRegisterInfo &MRI);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]35
36private:
Sam Koltondfa29f72016-03-09 12:29:31 +0000[diff] [blame]37 void printU4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Matt Arsenault4d7d3832014-04-15 22:32:49 +0000[diff] [blame]38 void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]39 void printU16ImmOperand(const MCInst *MI, unsigned OpNo,
40 const MCSubtargetInfo &STI, raw_ostream &O);
Sam Koltondfa29f72016-03-09 12:29:31 +0000[diff] [blame]41 void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Matt Arsenault61cc9082014-10-10 22:16:07 +0000[diff] [blame]42 void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
43 void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]44 void printU32ImmOperand(const MCInst *MI, unsigned OpNo,
45 const MCSubtargetInfo &STI, raw_ostream &O);
46 void printNamedBit(const MCInst *MI, unsigned OpNo, raw_ostream &O,
Matt Arsenaulte8dbf792016-07-05 22:06:56 +0000[diff] [blame]47 StringRef BitName);
Tom Stellard229d5e62014-08-05 14:48:12 +0000[diff] [blame]48 void printOffen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
49 void printIdxen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
50 void printAddr64(const MCInst *MI, unsigned OpNo, raw_ostream &O);
51 void printMBUFOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]52 void printOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
53 raw_ostream &O);
54 void printOffset0(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55 raw_ostream &O);
56 void printOffset1(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
57 raw_ostream &O);
58 void printSMRDOffset(const MCInst *MI, unsigned OpNo,
59 const MCSubtargetInfo &STI, raw_ostream &O);
60 void printSMRDLiteralOffset(const MCInst *MI, unsigned OpNo,
61 const MCSubtargetInfo &STI, raw_ostream &O);
62 void printGDS(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
63 raw_ostream &O);
64 void printGLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
65 raw_ostream &O);
66 void printSLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
67 raw_ostream &O);
68 void printTFE(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
69 raw_ostream &O);
70 void printDMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
71 raw_ostream &O);
72 void printUNorm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
73 raw_ostream &O);
74 void printDA(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
75 raw_ostream &O);
76 void printR128(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
77 raw_ostream &O);
78 void printLWE(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
79 raw_ostream &O);
Matt Arsenaultfcf86c52014-04-15 22:32:42 +0000[diff] [blame]80 void printRegOperand(unsigned RegNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]81 void printVOPDst(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
82 raw_ostream &O);
83 void printImmediate32(uint32_t Imm, raw_ostream &O);
84 void printImmediate64(uint64_t Imm, raw_ostream &O);
85 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
86 raw_ostream &O);
87 void printOperandAndFPInputMods(const MCInst *MI, unsigned OpNo,
88 const MCSubtargetInfo &STI, raw_ostream &O);
89 void printOperandAndIntInputMods(const MCInst *MI, unsigned OpNo,
90 const MCSubtargetInfo &STI, raw_ostream &O);
91 void printDPPCtrl(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
92 raw_ostream &O);
93 void printRowMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
94 raw_ostream &O);
95 void printBankMask(const MCInst *MI, unsigned OpNo,
96 const MCSubtargetInfo &STI, raw_ostream &O);
97 void printBoundCtrl(const MCInst *MI, unsigned OpNo,
98 const MCSubtargetInfo &STI, raw_ostream &O);
Sam Kolton3025e7f2016-04-26 13:33:56 +0000[diff] [blame]99 void printSDWASel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]100 void printSDWADstSel(const MCInst *MI, unsigned OpNo,
101 const MCSubtargetInfo &STI, raw_ostream &O);
102 void printSDWASrc0Sel(const MCInst *MI, unsigned OpNo,
103 const MCSubtargetInfo &STI, raw_ostream &O);
104 void printSDWASrc1Sel(const MCInst *MI, unsigned OpNo,
105 const MCSubtargetInfo &STI, raw_ostream &O);
106 void printSDWADstUnused(const MCInst *MI, unsigned OpNo,
107 const MCSubtargetInfo &STI, raw_ostream &O);
108 void printInterpSlot(const MCInst *MI, unsigned OpNo,
109 const MCSubtargetInfo &STI, raw_ostream &O);
110 void printMemOperand(const MCInst *MI, unsigned OpNo,
111 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenaultf45faaf2014-03-17 22:23:09 +0000[diff] [blame]112 static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
113 StringRef Asm, StringRef Default = "");
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]114 static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
115 char Asm);
116 void printAbs(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
117 raw_ostream &O);
118 void printClamp(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
119 raw_ostream &O);
120 void printClampSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
121 raw_ostream &O);
122 void printOModSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
123 raw_ostream &O);
124 void printLiteral(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
125 raw_ostream &O);
126 void printLast(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
127 raw_ostream &O);
128 void printNeg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
129 raw_ostream &O);
130 void printOMOD(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
131 raw_ostream &O);
132 void printRel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
133 raw_ostream &O);
134 void printUpdateExecMask(const MCInst *MI, unsigned OpNo,
135 const MCSubtargetInfo &STI, raw_ostream &O);
136 void printUpdatePred(const MCInst *MI, unsigned OpNo,
137 const MCSubtargetInfo &STI, raw_ostream &O);
138 void printWrite(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
139 raw_ostream &O);
140 void printSel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
141 void printBankSwizzle(const MCInst *MI, unsigned OpNo,
142 const MCSubtargetInfo &STI, raw_ostream &O);
143 void printRSel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
144 raw_ostream &O);
145 void printCT(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
146 raw_ostream &O);
147 void printKCache(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
148 raw_ostream &O);
149 void printSendMsg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
150 raw_ostream &O);
151 void printWaitFlag(const MCInst *MI, unsigned OpNo,
152 const MCSubtargetInfo &STI, raw_ostream &O);
153 void printHwreg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
154 raw_ostream &O);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]155};
156
157} // End namespace llvm
158
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000[diff] [blame]159#endif