blob: f7f919089b35a8ec09750b010c2ee3febe88e0f3 [file] [log] [blame]
Matt Beaumont-Gay7947aec2012-08-01 16:42:35 +00001; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=avx2,+fma -fp-contract=fast | FileCheck %s
Anitha Boyapati0dd589c2012-08-27 06:59:01 +00002; RUN: llc < %s -mcpu=bdver2 -mattr=-fma4 -fp-contract=fast | FileCheck %s
Matt Beaumont-Gay7947aec2012-08-01 16:42:35 +00003
4; CHECK: test_x86_fmadd_ps
5; CHECK: vfmadd213ps %xmm2, %xmm0, %xmm1
6; CHECK: ret
7define <4 x float> @test_x86_fmadd_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
8 %x = fmul <4 x float> %a0, %a1
9 %res = fadd <4 x float> %x, %a2
10 ret <4 x float> %res
11}
12
13; CHECK: test_x86_fmsub_ps
14; CHECK: fmsub213ps %xmm2, %xmm0, %xmm1
15; CHECK: ret
16define <4 x float> @test_x86_fmsub_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
17 %x = fmul <4 x float> %a0, %a1
18 %res = fsub <4 x float> %x, %a2
19 ret <4 x float> %res
20}
21
22; CHECK: test_x86_fnmadd_ps
23; CHECK: fnmadd213ps %xmm2, %xmm0, %xmm1
24; CHECK: ret
25define <4 x float> @test_x86_fnmadd_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
26 %x = fmul <4 x float> %a0, %a1
27 %res = fsub <4 x float> %a2, %x
28 ret <4 x float> %res
29}
30
31; CHECK: test_x86_fnmsub_ps
32; CHECK: fnmsub213ps %xmm2, %xmm0, %xmm1
33; CHECK: ret
34define <4 x float> @test_x86_fnmsub_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
35 %x = fmul <4 x float> %a0, %a1
36 %y = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x
37 %res = fsub <4 x float> %y, %a2
38 ret <4 x float> %res
39}
40
41; CHECK: test_x86_fmadd_ps_y
42; CHECK: vfmadd213ps %ymm2, %ymm0, %ymm1
43; CHECK: ret
44define <8 x float> @test_x86_fmadd_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
45 %x = fmul <8 x float> %a0, %a1
46 %res = fadd <8 x float> %x, %a2
47 ret <8 x float> %res
48}
49
50; CHECK: test_x86_fmsub_ps_y
51; CHECK: vfmsub213ps %ymm2, %ymm0, %ymm1
52; CHECK: ret
53define <8 x float> @test_x86_fmsub_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
54 %x = fmul <8 x float> %a0, %a1
55 %res = fsub <8 x float> %x, %a2
56 ret <8 x float> %res
57}
58
59; CHECK: test_x86_fnmadd_ps_y
60; CHECK: vfnmadd213ps %ymm2, %ymm0, %ymm1
61; CHECK: ret
62define <8 x float> @test_x86_fnmadd_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
63 %x = fmul <8 x float> %a0, %a1
64 %res = fsub <8 x float> %a2, %x
65 ret <8 x float> %res
66}
67
68; CHECK: test_x86_fnmsub_ps_y
69; CHECK: vfnmsub213ps %ymm2, %ymm0, %ymm1
70; CHECK: ret
71define <8 x float> @test_x86_fnmsub_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
72 %x = fmul <8 x float> %a0, %a1
73 %y = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x
74 %res = fsub <8 x float> %y, %a2
75 ret <8 x float> %res
76}
77
78; CHECK: test_x86_fmadd_pd_y
79; CHECK: vfmadd213pd %ymm2, %ymm0, %ymm1
80; CHECK: ret
81define <4 x double> @test_x86_fmadd_pd_y(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {
82 %x = fmul <4 x double> %a0, %a1
83 %res = fadd <4 x double> %x, %a2
84 ret <4 x double> %res
85}
86
87; CHECK: test_x86_fmsub_pd_y
88; CHECK: vfmsub213pd %ymm2, %ymm0, %ymm1
89; CHECK: ret
90define <4 x double> @test_x86_fmsub_pd_y(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {
91 %x = fmul <4 x double> %a0, %a1
92 %res = fsub <4 x double> %x, %a2
93 ret <4 x double> %res
94}
95
96; CHECK: test_x86_fmsub_pd
97; CHECK: vfmsub213pd %xmm2, %xmm0, %xmm1
98; CHECK: ret
99define <2 x double> @test_x86_fmsub_pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
100 %x = fmul <2 x double> %a0, %a1
101 %res = fsub <2 x double> %x, %a2
102 ret <2 x double> %res
103}
104
105; CHECK: test_x86_fnmadd_ss
106; CHECK: vfnmadd213ss %xmm2, %xmm0, %xmm1
107; CHECK: ret
108define float @test_x86_fnmadd_ss(float %a0, float %a1, float %a2) {
109 %x = fmul float %a0, %a1
110 %res = fsub float %a2, %x
111 ret float %res
112}
113
114; CHECK: test_x86_fnmadd_sd
115; CHECK: vfnmadd213sd %xmm2, %xmm0, %xmm1
116; CHECK: ret
117define double @test_x86_fnmadd_sd(double %a0, double %a1, double %a2) {
118 %x = fmul double %a0, %a1
119 %res = fsub double %a2, %x
120 ret double %res
121}
122
123; CHECK: test_x86_fmsub_sd
124; CHECK: vfmsub213sd %xmm2, %xmm0, %xmm1
125; CHECK: ret
126define double @test_x86_fmsub_sd(double %a0, double %a1, double %a2) {
127 %x = fmul double %a0, %a1
128 %res = fsub double %x, %a2
129 ret double %res
130}
131
132; CHECK: test_x86_fnmsub_ss
133; CHECK: vfnmsub213ss %xmm2, %xmm0, %xmm1
134; CHECK: ret
135define float @test_x86_fnmsub_ss(float %a0, float %a1, float %a2) {
136 %x = fsub float -0.000000e+00, %a0
137 %y = fmul float %x, %a1
138 %res = fsub float %y, %a2
139 ret float %res
140}