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gerrit-public.fairphone.software / toolchain / llvm-project / bfd08534b020b0feb420766a8d2b3fb0f295f551 / . / llvm / test / CodeGen / AMDGPU / llvm.amdgcn.tbuffer.store.d16.ll
blob: bbe21ea34a788ecd8ad38e84c99c2be0a8b92abe [file] [log] [blame]
Changpeng Fang29fcf882018-02-01 18:41:33 +0000[diff] [blame]1; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -show-mc-encoding | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=UNPACKED %s
Changpeng Fang44dfa1d2018-01-12 21:12:19 +0000[diff] [blame]2; RUN: llc < %s -march=amdgcn -mcpu=gfx810 -verify-machineinstrs | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=PACKED -check-prefix=GFX81 %s
3; RUN: llc < %s -march=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=PACKED -check-prefix=GFX9 %s
4
5
6; GCN-LABEL: {{^}}tbuffer_store_d16_x:
7; GCN: v_trunc_f16_e32 v[[LO:[0-9]+]], s{{[0-9]+}}
8; GCN: tbuffer_store_format_d16_x v[[LO]], v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], dfmt:1, nfmt:2, 0 idxen
9define amdgpu_kernel void @tbuffer_store_d16_x(<4 x i32> %rsrc, half %data, i32 %vindex) {
10main_body:
11 call void @llvm.amdgcn.tbuffer.store.f16(half %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 0, i32 1, i32 2, i1 0, i1 0)
12 ret void
13}
14
15
16; GCN-LABEL: {{^}}tbuffer_store_d16_xy:
17
Stanislav Mekhanoshinc078ca92018-02-14 18:05:14 +0000[diff] [blame]18; UNPACKED: flat_load_ushort v[[HI:[0-9]+]], v[{{[0-9]+:[0-9]+}}] ;
19; UNPACKED: flat_load_ushort v[[LO:[0-9]+]], v[{{[0-9]+:[0-9]+}}] ;
Changpeng Fang44dfa1d2018-01-12 21:12:19 +0000[diff] [blame]20; UNPACKED: tbuffer_store_format_d16_xy v{{\[}}[[LO]]:[[HI]]{{\]}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], dfmt:1, nfmt:2, 0 idxen
21
22; PACKED: tbuffer_store_format_d16_xy v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], dfmt:1, nfmt:2, 0 idxen
23define amdgpu_kernel void @tbuffer_store_d16_xy(<4 x i32> %rsrc, <2 x half> %data, i32 %vindex) {
24main_body:
25 call void @llvm.amdgcn.tbuffer.store.v2f16(<2 x half> %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 0, i32 1, i32 2, i1 0, i1 0)
26 ret void
27}
28
29
30; GCN-LABEL: {{^}}tbuffer_store_d16_xyzw:
31
Stanislav Mekhanoshinc078ca92018-02-14 18:05:14 +0000[diff] [blame]32; UNPACKED: flat_load_ushort v[[HI:[0-9]+]], v[{{[0-9]+:[0-9]+}}] ;
33; UNPACKED: flat_load_ushort v{{[0-9]+}}, v[{{[0-9]+:[0-9]+}}] ;
34; UNPACKED: flat_load_ushort v{{[0-9]+}}, v[{{[0-9]+:[0-9]+}}] ;
35; UNPACKED: flat_load_ushort v[[LO:[0-9]+]], v[{{[0-9]+:[0-9]+}}] ;
Changpeng Fang44dfa1d2018-01-12 21:12:19 +0000[diff] [blame]36; UNPACKED: tbuffer_store_format_d16_xyzw v{{\[}}[[LO]]:[[HI]]{{\]}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], dfmt:1, nfmt:2, 0 idxen
37
38; GFX81: v_or_b32_e32 v[[HI:[0-9]+]]
39; GFX81: v_or_b32_e32 v[[LO:[0-9]+]]
40
41; GFX9: v_mov_b32_e32 v[[LO:[0-9]+]]
42; GFX9: v_mov_b32_e32 v[[HI:[0-9]+]]
43
44; PACKED: tbuffer_store_format_d16_xyzw v{{\[}}[[LO]]:[[HI]]{{\]}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], dfmt:1, nfmt:2, 0 idxen
45define amdgpu_kernel void @tbuffer_store_d16_xyzw(<4 x i32> %rsrc, <4 x half> %data, i32 %vindex) {
46main_body:
47 call void @llvm.amdgcn.tbuffer.store.v4f16(<4 x half> %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 0, i32 1, i32 2, i1 0, i1 0)
48 ret void
49}
50
51declare void @llvm.amdgcn.tbuffer.store.f16(half, <4 x i32>, i32, i32, i32, i32, i32, i32, i1, i1)
52declare void @llvm.amdgcn.tbuffer.store.v2f16(<2 x half>, <4 x i32>, i32, i32, i32, i32, i32, i32, i1, i1)
53declare void @llvm.amdgcn.tbuffer.store.v4f16(<4 x half>, <4 x i32>, i32, i32, i32, i32, i32, i32, i1, i1)