Silviu Baranga | 82d0426 | 2016-04-25 14:29:18 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=armv7-none-eabi -mattr=-neon,-vfpv2 %s -o - | FileCheck %s -check-prefix=novfp |
| 2 | ; RUN: llc -mtriple=armv7-none-eabi -mattr=+neon %s -float-abi=hard -o - | FileCheck %s -check-prefix=vfp |
| 3 | |
| 4 | ; vfp-LABEL: f1 |
| 5 | ; vfp-CHECK: vadd.f32 s0, s0, s0 |
| 6 | |
| 7 | ; In the novfp case, the compiler is forced to assign a core register. |
| 8 | ; Although this register class can't be used with the vadd.f32 instruction, |
| 9 | ; the compiler behaved as expected since it is allowed to emit anything. |
| 10 | |
| 11 | ; novfp-LABEL: f1 |
| 12 | ; novfp-CHECK: vadd.f32 r0, r0, r0 |
| 13 | |
| 14 | ; This can be generated by a function such as: |
| 15 | ; void f1(float f) {asm volatile ("add.f32 $0, $0, $0" : : "X" (f));} |
| 16 | |
| 17 | define arm_aapcs_vfpcc void @f1(float %f) { |
| 18 | entry: |
| 19 | call void asm sideeffect "vadd.f32 $0, $0, $0", "X" (float %f) nounwind |
| 20 | ret void |
| 21 | } |