Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 642c1a296814ac4ba8d001bfc806d17d9afd62bf / . / llvm / test / CodeGen / ARM / fast-isel-pic.ll
blob: da7007bd4a98b4b72cf5a1dbd55c341b2dbe8a75 [file] [log] [blame]
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000[diff] [blame]1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=arm-apple-ios | FileCheck %s --check-prefix=ARM
3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARMv7
4; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=thumbv7-none-linux-gnueabi | FileCheck %s --check-prefix=THUMB-ELF
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]5; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=pic -mtriple=armv7-none-linux-gnueabi | FileCheck %s --check-prefix=ARMv7-ELF
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]6
7@g = global i32 0, align 4
8
9define i32 @LoadGV() {
10entry:
11; THUMB: LoadGV
12; THUMB: movw [[reg0:r[0-9]+]],
13; THUMB: movt [[reg0]],
14; THUMB: add [[reg0]], pc
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]15; THUMB-ELF: LoadGV
16; THUMB-ELF: ldr.n r[[reg0:[0-9]+]],
17; THUMB-ELF: ldr.n r[[reg1:[0-9]+]],
Andrew Tricke2431c62013-05-25 03:08:10 +0000[diff] [blame]18; THUMB-ELF: ldr r[[reg0]], [r[[reg0]], r[[reg1]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]19; ARM: LoadGV
20; ARM: ldr [[reg1:r[0-9]+]],
21; ARM: add [[reg1]], pc, [[reg1]]
22; ARMv7: LoadGV
23; ARMv7: movw [[reg2:r[0-9]+]],
24; ARMv7: movt [[reg2]],
25; ARMv7: add [[reg2]], pc, [[reg2]]
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]26; ARMv7-ELF: LoadGV
27; ARMv7-ELF: ldr r[[reg2:[0-9]+]],
28; ARMv7-ELF: ldr r[[reg3:[0-9]+]],
Rafael Espindola99bd2ae2013-05-30 20:37:52 +0000[diff] [blame]29; ARMv7-ELF: ldr r[[reg2]], [r[[reg2]], r[[reg3]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]30 %tmp = load i32* @g
31 ret i32 %tmp
32}
33
34@i = external global i32
35
36define i32 @LoadIndirectSymbol() {
37entry:
38; THUMB: LoadIndirectSymbol
39; THUMB: movw r[[reg3:[0-9]+]],
40; THUMB: movt r[[reg3]],
41; THUMB: add r[[reg3]], pc
42; THUMB: ldr r[[reg3]], [r[[reg3]]]
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]43; THUMB-ELF: LoadIndirectSymbol
44; THUMB-ELF: ldr.n r[[reg3:[0-9]+]],
45; THUMB-ELF: ldr.n r[[reg4:[0-9]+]],
Andrew Tricke2431c62013-05-25 03:08:10 +0000[diff] [blame]46; THUMB-ELF: ldr r[[reg3]], [r[[reg3]], r[[reg4]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]47; ARM: LoadIndirectSymbol
48; ARM: ldr [[reg4:r[0-9]+]],
49; ARM: ldr [[reg4]], [pc, [[reg4]]]
50; ARMv7: LoadIndirectSymbol
51; ARMv7: movw r[[reg5:[0-9]+]],
52; ARMv7: movt r[[reg5]],
53; ARMv7: add r[[reg5]], pc, r[[reg5]]
54; ARMv7: ldr r[[reg5]], [r[[reg5]]]
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]55; ARMv7-ELF: LoadIndirectSymbol
56; ARMv7-ELF: ldr r[[reg5:[0-9]+]],
57; ARMv7-ELF: ldr r[[reg6:[0-9]+]],
Rafael Espindola99bd2ae2013-05-30 20:37:52 +0000[diff] [blame]58; ARMv7-ELF: ldr r[[reg5]], [r[[reg5]], r[[reg6]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]59 %tmp = load i32* @i
60 ret i32 %tmp
61}