blob: a12b94f8f55f5157c2de550ebbdf82d2f1000d8b [file] [log] [blame]
Dan Gohman10e730a2015-06-29 23:51:55 +00001//==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief This file provides WebAssembly-specific target descriptions.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
17
Dan Gohmana11fb232016-01-12 03:09:16 +000018#include "llvm/MC/MCInstrDesc.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000019#include "llvm/Support/DataTypes.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000020
21namespace llvm {
22
Dan Gohman10e730a2015-06-29 23:51:55 +000023class MCAsmBackend;
24class MCCodeEmitter;
25class MCContext;
26class MCInstrInfo;
Dan Gohman10e730a2015-06-29 23:51:55 +000027class MCObjectWriter;
Dan Gohman10e730a2015-06-29 23:51:55 +000028class MCSubtargetInfo;
Dan Gohman3acb1872016-10-24 23:27:49 +000029class MVT;
Dan Gohman10e730a2015-06-29 23:51:55 +000030class Target;
31class Triple;
Dan Gohman53828fd2015-11-23 16:50:18 +000032class raw_pwrite_stream;
Dan Gohman10e730a2015-06-29 23:51:55 +000033
Mehdi Aminif42454b2016-10-09 23:00:34 +000034Target &getTheWebAssemblyTarget32();
35Target &getTheWebAssemblyTarget64();
Dan Gohman10e730a2015-06-29 23:51:55 +000036
Dan Gohmandf4f4d42017-02-10 00:14:42 +000037MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII,
38 MCContext &Ctx);
Dan Gohman53828fd2015-11-23 16:50:18 +000039
Dan Gohmancceedf72016-01-08 00:43:54 +000040MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT);
Dan Gohman10e730a2015-06-29 23:51:55 +000041
Dan Gohman05ac43f2015-12-17 01:39:00 +000042MCObjectWriter *createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS,
43 bool Is64Bit, uint8_t OSABI);
44
Dan Gohmana11fb232016-01-12 03:09:16 +000045namespace WebAssembly {
46enum OperandType {
47 /// Basic block label in a branch construct.
48 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
Dan Gohman4fc4e422016-10-24 19:49:43 +000049 /// Local index.
50 OPERAND_LOCAL,
Dan Gohmanb89f2d32017-02-02 19:29:44 +000051 /// Global index.
52 OPERAND_GLOBAL,
Dan Gohman5a68ec72016-10-05 21:24:08 +000053 /// 32-bit integer immediates.
54 OPERAND_I32IMM,
55 /// 64-bit integer immediates.
56 OPERAND_I64IMM,
Dan Gohmanaa742912016-02-16 15:14:23 +000057 /// 32-bit floating-point immediates.
Dan Gohman4b8e8be2016-10-03 21:31:31 +000058 OPERAND_F32IMM,
Dan Gohmanaa742912016-02-16 15:14:23 +000059 /// 64-bit floating-point immediates.
Dan Gohman4b8e8be2016-10-03 21:31:31 +000060 OPERAND_F64IMM,
Dan Gohman00d734d2016-12-23 03:23:52 +000061 /// 32-bit unsigned function indices.
62 OPERAND_FUNCTION32,
63 /// 32-bit unsigned memory offsets.
64 OPERAND_OFFSET32,
Dan Gohmanbb372242016-01-26 03:39:31 +000065 /// p2align immediate for load and store address alignment.
Dan Gohman2726b882016-10-06 22:29:32 +000066 OPERAND_P2ALIGN,
67 /// signature immediate for block/loop.
68 OPERAND_SIGNATURE
Dan Gohmana11fb232016-01-12 03:09:16 +000069};
70} // end namespace WebAssembly
71
72namespace WebAssemblyII {
73enum {
74 // For variadic instructions, this flag indicates whether an operand
75 // in the variable_ops range is an immediate value.
Dan Gohman3469ee12016-01-12 20:30:51 +000076 VariableOpIsImmediate = (1 << 0),
Dan Gohman1d68e80f2016-01-12 19:14:46 +000077 // For immediate values in the variable_ops range, this flag indicates
78 // whether the value represents a control-flow label.
Dan Gohman3acb1872016-10-24 23:27:49 +000079 VariableOpImmediateIsLabel = (1 << 1)
Dan Gohmana11fb232016-01-12 03:09:16 +000080};
81} // end namespace WebAssemblyII
82
Dan Gohman10e730a2015-06-29 23:51:55 +000083} // end namespace llvm
84
85// Defines symbolic names for WebAssembly registers. This defines a mapping from
86// register name to register number.
87//
JF Bastien5ca0bac2015-07-10 18:23:10 +000088#define GET_REGINFO_ENUM
89#include "WebAssemblyGenRegisterInfo.inc"
90
JF Bastienb9073fb2015-07-22 21:28:15 +000091// Defines symbolic names for the WebAssembly instructions.
92//
93#define GET_INSTRINFO_ENUM
94#include "WebAssemblyGenInstrInfo.inc"
95
Dan Gohman10e730a2015-06-29 23:51:55 +000096#define GET_SUBTARGETINFO_ENUM
97#include "WebAssemblyGenSubtargetInfo.inc"
98
Dan Gohmanbb372242016-01-26 03:39:31 +000099namespace llvm {
100namespace WebAssembly {
101
102/// Return the default p2align value for a load or store with the given opcode.
103inline unsigned GetDefaultP2Align(unsigned Opcode) {
104 switch (Opcode) {
105 case WebAssembly::LOAD8_S_I32:
106 case WebAssembly::LOAD8_U_I32:
107 case WebAssembly::LOAD8_S_I64:
108 case WebAssembly::LOAD8_U_I64:
109 case WebAssembly::STORE8_I32:
110 case WebAssembly::STORE8_I64:
111 return 0;
112 case WebAssembly::LOAD16_S_I32:
113 case WebAssembly::LOAD16_U_I32:
114 case WebAssembly::LOAD16_S_I64:
115 case WebAssembly::LOAD16_U_I64:
116 case WebAssembly::STORE16_I32:
117 case WebAssembly::STORE16_I64:
118 return 1;
119 case WebAssembly::LOAD_I32:
120 case WebAssembly::LOAD_F32:
121 case WebAssembly::STORE_I32:
122 case WebAssembly::STORE_F32:
123 case WebAssembly::LOAD32_S_I64:
124 case WebAssembly::LOAD32_U_I64:
125 case WebAssembly::STORE32_I64:
126 return 2;
127 case WebAssembly::LOAD_I64:
128 case WebAssembly::LOAD_F64:
129 case WebAssembly::STORE_I64:
130 case WebAssembly::STORE_F64:
131 return 3;
Derek Schuffc64d7652016-08-01 22:25:02 +0000132 default:
133 llvm_unreachable("Only loads and stores have p2align values");
Dan Gohmanbb372242016-01-26 03:39:31 +0000134 }
135}
136
Derek Schuffc97ba932016-01-30 21:43:08 +0000137/// The operand number of the load or store address in load/store instructions.
Dan Gohman48abaa92016-10-25 00:17:11 +0000138static const unsigned LoadAddressOperandNo = 3;
139static const unsigned StoreAddressOperandNo = 2;
Dan Gohman7f1bdb22016-10-06 22:08:28 +0000140
141/// The operand number of the load or store p2align in load/store instructions.
Dan Gohman48abaa92016-10-25 00:17:11 +0000142static const unsigned LoadP2AlignOperandNo = 1;
143static const unsigned StoreP2AlignOperandNo = 0;
Dan Gohmanbb372242016-01-26 03:39:31 +0000144
Dan Gohman2726b882016-10-06 22:29:32 +0000145/// This is used to indicate block signatures.
Dan Gohman4fc4e422016-10-24 19:49:43 +0000146enum class ExprType {
Dan Gohman3acb1872016-10-24 23:27:49 +0000147 Void = 0x40,
148 I32 = 0x7f,
149 I64 = 0x7e,
150 F32 = 0x7d,
151 F64 = 0x7c,
152 I8x16 = 0x7b,
153 I16x8 = 0x7a,
154 I32x4 = 0x79,
155 F32x4 = 0x78,
156 B8x16 = 0x77,
157 B16x8 = 0x76,
158 B32x4 = 0x75
Dan Gohman2726b882016-10-06 22:29:32 +0000159};
160
Dan Gohman4fc4e422016-10-24 19:49:43 +0000161/// This is used to indicate local types.
162enum class ValType {
Dan Gohman3acb1872016-10-24 23:27:49 +0000163 I32 = 0x7f,
164 I64 = 0x7e,
165 F32 = 0x7d,
166 F64 = 0x7c,
167 I8x16 = 0x7b,
168 I16x8 = 0x7a,
169 I32x4 = 0x79,
170 F32x4 = 0x78,
171 B8x16 = 0x77,
172 B16x8 = 0x76,
173 B32x4 = 0x75
Dan Gohman4fc4e422016-10-24 19:49:43 +0000174};
175
Dan Gohman3acb1872016-10-24 23:27:49 +0000176/// Instruction opcodes emitted via means other than CodeGen.
177static const unsigned Nop = 0x01;
178static const unsigned End = 0x0b;
179
180ValType toValType(const MVT &Ty);
181
Dan Gohmanbb372242016-01-26 03:39:31 +0000182} // end namespace WebAssembly
183} // end namespace llvm
184
Dan Gohman10e730a2015-06-29 23:51:55 +0000185#endif