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gerrit-public.fairphone.software / toolchain / llvm-project / 1d6ebdfb66b9d63d34f34ec6ac7ec57eff7cd24b / . / clang / test / CodeGen / attr-mustprogress-1.cpp
blob: 945d74663c6d1ee41f4c4c868faec85d9043eb21 [file] [log] [blame]
Atmn Patelac73b732020-11-02 16:03:21 -0500[diff] [blame]1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-attributes
2// RUN: %clang_cc1 -std=c++11 -triple=x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s
3// RUN: %clang_cc1 -std=c++14 -triple=x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s
4// RUN: %clang_cc1 -std=c++17 -triple=x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s
5// RUN: %clang_cc1 -std=c++20 -triple=x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s
6
7int a = 0;
8int b = 0;
9
10// CHECK: Function Attrs: noinline nounwind optnone
Atmn Patelfd3cad72020-11-09 08:19:44 -0500[diff] [blame]11// CHECK-LABEL: @_Z2f0v(
12// CHECK-NEXT: entry:
13// CHECK-NEXT: br label [[FOR_COND:%.*]]
14// CHECK: for.cond:
15// CHECK-NOT: br label [[FOR_COND]], !llvm.loop !{{.*}}
16void f0() {
17 for (; ;) ;
18}
19
20// CHECK: Function Attrs: noinline nounwind optnone
Atmn Patelac73b732020-11-02 16:03:21 -0500[diff] [blame]21// CHECK-LABEL: @_Z2f1v(
22// CHECK-NEXT: entry:
23// CHECK-NEXT: br label [[FOR_COND:%.*]]
24// CHECK: for.cond:
25// CHECK-NEXT: br i1 true, label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
26// CHECK: for.body:
27// CHECK-NEXT: br label [[FOR_COND]]
28// CHECK: for.end:
29// CHECK-NEXT: ret void
30//
31void f1() {
32 for (; 1;)
33 ;
34}
35
36// CHECK: Function Attrs: noinline nounwind optnone mustprogress
37// CHECK-LABEL: @_Z2f2v(
38// CHECK-NEXT: entry:
39// CHECK-NEXT: br label [[FOR_COND:%.*]]
40// CHECK: for.cond:
41// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
42// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
43// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
44// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
45// CHECK: for.body:
46// CHECK-NEXT: br label [[FOR_COND]], [[LOOP2:!llvm.loop !.*]]
47// CHECK: for.end:
48// CHECK-NEXT: ret void
49//
50void f2() {
51 for (; a == b;)
52 ;
53}
54
55// CHECK: Function Attrs: noinline nounwind optnone
56// CHECK-LABEL: @_Z1Fv(
57// CHECK-NEXT: entry:
58// CHECK-NEXT: br label [[FOR_COND:%.*]]
59// CHECK: for.cond:
60// CHECK-NEXT: br i1 true, label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
61// CHECK: for.body:
62// CHECK-NEXT: br label [[FOR_COND]]
63// CHECK: for.end:
64// CHECK-NEXT: br label [[FOR_COND1:%.*]]
65// CHECK: for.cond1:
66// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
67// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
68// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
69// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY2:%.*]], label [[FOR_END3:%.*]]
70// CHECK: for.body2:
71// CHECK-NEXT: br label [[FOR_COND1]], [[LOOP4:!llvm.loop !.*]]
72// CHECK: for.end3:
73// CHECK-NEXT: ret void
74//
75void F() {
76 for (; 1;)
77 ;
78 for (; a == b;)
79 ;
80}
81
82// CHECK: Function Attrs: noinline nounwind optnone
83// CHECK-LABEL: @_Z2F2v(
84// CHECK-NEXT: entry:
85// CHECK-NEXT: br label [[FOR_COND:%.*]]
86// CHECK: for.cond:
87// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
88// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
89// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
90// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
91// CHECK: for.body:
92// CHECK-NEXT: br label [[FOR_COND]], [[LOOP5:!llvm.loop !.*]]
93// CHECK: for.end:
94// CHECK-NEXT: br label [[FOR_COND1:%.*]]
95// CHECK: for.cond1:
96// CHECK-NEXT: br i1 true, label [[FOR_BODY2:%.*]], label [[FOR_END3:%.*]]
97// CHECK: for.body2:
98// CHECK-NEXT: br label [[FOR_COND1]]
99// CHECK: for.end3:
100// CHECK-NEXT: ret void
101//
102void F2() {
103 for (; a == b;)
104 ;
105 for (; 1;)
106 ;
107}
108
109// CHECK: Function Attrs: noinline nounwind optnone
110// CHECK-LABEL: @_Z2w1v(
111// CHECK-NEXT: entry:
112// CHECK-NEXT: br label [[WHILE_BODY:%.*]]
113// CHECK: while.body:
114// CHECK-NEXT: br label [[WHILE_BODY]]
115//
116void w1() {
117 while (1)
118 ;
119}
120
121// CHECK: Function Attrs: noinline nounwind optnone mustprogress
122// CHECK-LABEL: @_Z2w2v(
123// CHECK-NEXT: entry:
124// CHECK-NEXT: br label [[WHILE_COND:%.*]]
125// CHECK: while.cond:
126// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
127// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
128// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
129// CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY:%.*]], label [[WHILE_END:%.*]]
130// CHECK: while.body:
131// CHECK-NEXT: br label [[WHILE_COND]], [[LOOP6:!llvm.loop !.*]]
132// CHECK: while.end:
133// CHECK-NEXT: ret void
134//
135void w2() {
136 while (a == b)
137 ;
138}
139
140// CHECK: Function Attrs: noinline nounwind optnone
141// CHECK-LABEL: @_Z1Wv(
142// CHECK-NEXT: entry:
143// CHECK-NEXT: br label [[WHILE_COND:%.*]]
144// CHECK: while.cond:
145// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
146// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
147// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
148// CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY:%.*]], label [[WHILE_END:%.*]]
149// CHECK: while.body:
150// CHECK-NEXT: br label [[WHILE_COND]], [[LOOP7:!llvm.loop !.*]]
151// CHECK: while.end:
152// CHECK-NEXT: br label [[WHILE_BODY2:%.*]]
153// CHECK: while.body2:
154// CHECK-NEXT: br label [[WHILE_BODY2]]
155//
156void W() {
157 while (a == b)
158 ;
159 while (1)
160 ;
161}
162
163// CHECK: Function Attrs: noinline nounwind optnone
164// CHECK-LABEL: @_Z2W2v(
165// CHECK-NEXT: entry:
166// CHECK-NEXT: br label [[WHILE_BODY:%.*]]
167// CHECK: while.body:
168// CHECK-NEXT: br label [[WHILE_BODY]]
169//
170void W2() {
171 while (1)
172 ;
173 while (a == b)
174 ;
175}
176
177// CHECK: Function Attrs: noinline nounwind optnone
178// CHECK-LABEL: @_Z2d1v(
179// CHECK-NEXT: entry:
180// CHECK-NEXT: br label [[DO_BODY:%.*]]
181// CHECK: do.body:
182// CHECK-NEXT: br label [[DO_COND:%.*]]
183// CHECK: do.cond:
184// CHECK-NEXT: br i1 true, label [[DO_BODY]], label [[DO_END:%.*]]
185// CHECK: do.end:
186// CHECK-NEXT: ret void
187//
188void d1() {
189 do
190 ;
191 while (1);
192}
193
194// CHECK: Function Attrs: noinline nounwind optnone mustprogress
195// CHECK-LABEL: @_Z2d2v(
196// CHECK-NEXT: entry:
197// CHECK-NEXT: br label [[DO_BODY:%.*]]
198// CHECK: do.body:
199// CHECK-NEXT: br label [[DO_COND:%.*]]
200// CHECK: do.cond:
201// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
202// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
203// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
204// CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY]], label [[DO_END:%.*]], [[LOOP8:!llvm.loop !.*]]
205// CHECK: do.end:
206// CHECK-NEXT: ret void
207//
208void d2() {
209 do
210 ;
211 while (a == b);
212}
213
214// CHECK: Function Attrs: noinline nounwind optnone
215// CHECK-LABEL: @_Z1Dv(
216// CHECK-NEXT: entry:
217// CHECK-NEXT: br label [[DO_BODY:%.*]]
218// CHECK: do.body:
219// CHECK-NEXT: br label [[DO_COND:%.*]]
220// CHECK: do.cond:
221// CHECK-NEXT: br i1 true, label [[DO_BODY]], label [[DO_END:%.*]]
222// CHECK: do.end:
223// CHECK-NEXT: br label [[DO_BODY1:%.*]]
224// CHECK: do.body1:
225// CHECK-NEXT: br label [[DO_COND2:%.*]]
226// CHECK: do.cond2:
227// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
228// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
229// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
230// CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY1]], label [[DO_END3:%.*]], [[LOOP9:!llvm.loop !.*]]
231// CHECK: do.end3:
232// CHECK-NEXT: ret void
233//
234void D() {
235 do
236 ;
237 while (1);
238 do
239 ;
240 while (a == b);
241}
242
243// CHECK: Function Attrs: noinline nounwind optnone
244// CHECK-LABEL: @_Z2D2v(
245// CHECK-NEXT: entry:
246// CHECK-NEXT: br label [[DO_BODY:%.*]]
247// CHECK: do.body:
248// CHECK-NEXT: br label [[DO_COND:%.*]]
249// CHECK: do.cond:
250// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
251// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
252// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
253// CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY]], label [[DO_END:%.*]], [[LOOP10:!llvm.loop !.*]]
254// CHECK: do.end:
255// CHECK-NEXT: br label [[DO_BODY1:%.*]]
256// CHECK: do.body1:
257// CHECK-NEXT: br label [[DO_COND2:%.*]]
258// CHECK: do.cond2:
259// CHECK-NEXT: br i1 true, label [[DO_BODY1]], label [[DO_END3:%.*]]
260// CHECK: do.end3:
261// CHECK-NEXT: ret void
262//
263void D2() {
264 do
265 ;
266 while (a == b);
267 do
268 ;
269 while (1);
270}
271