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Rafael Espindolaffdc24b2006-05-14 22:18:28 +00001//===- ARMInstrInfo.cpp - ARM Instruction Information -----------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
Rafael Espindolaffdc24b2006-05-14 22:18:28 +00006// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the ARM implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "ARMInstrInfo.h"
15#include "ARM.h"
Evan Cheng10043e22007-01-19 07:51:42 +000016#include "ARMAddressingModes.h"
Rafael Espindolaffdc24b2006-05-14 22:18:28 +000017#include "ARMGenInstrInfo.inc"
Evan Cheng10043e22007-01-19 07:51:42 +000018#include "ARMMachineFunctionInfo.h"
Owen Andersone2f23a32007-09-07 04:06:50 +000019#include "llvm/ADT/STLExtras.h"
Evan Cheng10043e22007-01-19 07:51:42 +000020#include "llvm/CodeGen/LiveVariables.h"
Owen Anderson6bb0c522008-01-04 23:57:37 +000021#include "llvm/CodeGen/MachineFrameInfo.h"
Evan Cheng760c68b2007-01-29 23:45:17 +000022#include "llvm/CodeGen/MachineInstrBuilder.h"
23#include "llvm/CodeGen/MachineJumpTableInfo.h"
Chris Lattner7b26fce2009-08-22 20:48:53 +000024#include "llvm/MC/MCAsmInfo.h"
Rafael Espindolaffdc24b2006-05-14 22:18:28 +000025using namespace llvm;
26
Anton Korobeynikov99152f32009-06-26 21:28:53 +000027ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI)
Anton Korobeynikov14635da2009-11-02 00:10:38 +000028 : ARMBaseInstrInfo(STI), RI(*this, STI) {
Anton Korobeynikov99152f32009-06-26 21:28:53 +000029}
Rafael Espindola8c41f992006-08-08 20:35:03 +000030
Chris Lattnere98a3c32009-08-02 05:20:37 +000031unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const {
Evan Cheng10043e22007-01-19 07:51:42 +000032 switch (Opc) {
33 default: break;
34 case ARM::LDR_PRE:
35 case ARM::LDR_POST:
Jim Grosbach1e4d9a12010-10-26 22:37:02 +000036 return ARM::LDRi12;
Evan Cheng10043e22007-01-19 07:51:42 +000037 case ARM::LDRH_PRE:
38 case ARM::LDRH_POST:
39 return ARM::LDRH;
40 case ARM::LDRB_PRE:
41 case ARM::LDRB_POST:
42 return ARM::LDRB;
43 case ARM::LDRSH_PRE:
44 case ARM::LDRSH_POST:
45 return ARM::LDRSH;
46 case ARM::LDRSB_PRE:
47 case ARM::LDRSB_POST:
48 return ARM::LDRSB;
49 case ARM::STR_PRE:
50 case ARM::STR_POST:
51 return ARM::STR;
52 case ARM::STRH_PRE:
53 case ARM::STRH_POST:
54 return ARM::STRH;
55 case ARM::STRB_PRE:
56 case ARM::STRB_POST:
57 return ARM::STRB;
58 }
David Goodwinaf7451b2009-07-08 16:09:28 +000059
Evan Cheng10043e22007-01-19 07:51:42 +000060 return 0;
61}
62
David Goodwinaf7451b2009-07-08 16:09:28 +000063void ARMInstrInfo::
Evan Chengfe864422009-11-08 00:15:23 +000064reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Evan Cheng6ad7da92009-11-14 02:55:43 +000065 unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig,
Jakob Stoklund Olesena8ad9772010-06-02 22:47:25 +000066 const TargetRegisterInfo &TRI) const {
David Goodwinaf7451b2009-07-08 16:09:28 +000067 DebugLoc dl = Orig->getDebugLoc();
Evan Cheng207b2462009-11-06 23:52:48 +000068 unsigned Opcode = Orig->getOpcode();
69 switch (Opcode) {
Evan Chengfe864422009-11-08 00:15:23 +000070 default:
Evan Cheng207b2462009-11-06 23:52:48 +000071 break;
Evan Chengfe864422009-11-08 00:15:23 +000072 case ARM::MOVi2pieces: {
David Goodwin03ab0bb2009-07-08 20:28:28 +000073 RI.emitLoadConstPool(MBB, I, dl,
Evan Cheng84517442009-07-16 09:20:10 +000074 DestReg, SubIdx,
David Goodwinaf7451b2009-07-08 16:09:28 +000075 Orig->getOperand(1).getImm(),
76 (ARMCC::CondCodes)Orig->getOperand(2).getImm(),
77 Orig->getOperand(3).getReg());
Evan Chengfe864422009-11-08 00:15:23 +000078 MachineInstr *NewMI = prior(I);
79 NewMI->getOperand(0).setSubReg(SubIdx);
80 return;
81 }
David Goodwinaf7451b2009-07-08 16:09:28 +000082 }
83
Evan Cheng6ad7da92009-11-14 02:55:43 +000084 return ARMBaseInstrInfo::reMaterialize(MBB, I, DestReg, SubIdx, Orig, TRI);
David Goodwinaf7451b2009-07-08 16:09:28 +000085}
Chris Lattnere98a3c32009-08-02 05:20:37 +000086