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Justin Holewinskiae556d32012-05-04 20:18:50 +00001//===-- NVPTXTargetMachine.cpp - Define TargetMachine for NVPTX -----------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the NVPTX target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "NVPTXTargetMachine.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000015#include "MCTargetDesc/NVPTXMCAsmInfo.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000016#include "NVPTX.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000017#include "NVPTXAllocaHoisting.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000018#include "NVPTXLowerAggrCopies.h"
19#include "NVPTXSplitBBatBar.h"
20#include "llvm/ADT/OwningPtr.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000021#include "llvm/Analysis/Passes.h"
22#include "llvm/Analysis/Verifier.h"
23#include "llvm/Assembly/PrintModulePass.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000024#include "llvm/CodeGen/AsmPrinter.h"
25#include "llvm/CodeGen/MachineFunctionAnalysis.h"
26#include "llvm/CodeGen/MachineModuleInfo.h"
27#include "llvm/CodeGen/Passes.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000028#include "llvm/IR/DataLayout.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000029#include "llvm/MC/MCAsmInfo.h"
30#include "llvm/MC/MCInstrInfo.h"
31#include "llvm/MC/MCStreamer.h"
32#include "llvm/MC/MCSubtargetInfo.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000033#include "llvm/PassManager.h"
34#include "llvm/Support/CommandLine.h"
35#include "llvm/Support/Debug.h"
36#include "llvm/Support/FormattedStream.h"
37#include "llvm/Support/TargetRegistry.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000038#include "llvm/Support/raw_ostream.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000039#include "llvm/Target/TargetInstrInfo.h"
40#include "llvm/Target/TargetLowering.h"
41#include "llvm/Target/TargetLoweringObjectFile.h"
42#include "llvm/Target/TargetMachine.h"
43#include "llvm/Target/TargetOptions.h"
44#include "llvm/Target/TargetRegisterInfo.h"
45#include "llvm/Target/TargetSubtargetInfo.h"
46#include "llvm/Transforms/Scalar.h"
Justin Holewinskiae556d32012-05-04 20:18:50 +000047
Justin Holewinskiae556d32012-05-04 20:18:50 +000048using namespace llvm;
49
Justin Holewinskib94bd052013-03-30 14:29:25 +000050namespace llvm {
51void initializeNVVMReflectPass(PassRegistry&);
52}
53
Justin Holewinskiae556d32012-05-04 20:18:50 +000054extern "C" void LLVMInitializeNVPTXTarget() {
55 // Register the target.
56 RegisterTargetMachine<NVPTXTargetMachine32> X(TheNVPTXTarget32);
57 RegisterTargetMachine<NVPTXTargetMachine64> Y(TheNVPTXTarget64);
58
59 RegisterMCAsmInfo<NVPTXMCAsmInfo> A(TheNVPTXTarget32);
60 RegisterMCAsmInfo<NVPTXMCAsmInfo> B(TheNVPTXTarget64);
61
Justin Holewinskib94bd052013-03-30 14:29:25 +000062 // FIXME: This pass is really intended to be invoked during IR optimization,
63 // but it's very NVPTX-specific.
64 initializeNVVMReflectPass(*PassRegistry::getPassRegistry());
Justin Holewinskiae556d32012-05-04 20:18:50 +000065}
66
Justin Holewinski0497ab12013-03-30 14:29:21 +000067NVPTXTargetMachine::NVPTXTargetMachine(
68 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
69 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
70 CodeGenOpt::Level OL, bool is64bit)
71 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
72 Subtarget(TT, CPU, FS, is64bit), DL(Subtarget.getDataLayout()),
73 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
74 FrameLowering(
Rafael Espindola227144c2013-05-13 01:16:13 +000075 *this, is64bit) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {
76 initAsmInfo();
77}
Justin Holewinskiae556d32012-05-04 20:18:50 +000078
79void NVPTXTargetMachine32::anchor() {}
80
Justin Holewinski0497ab12013-03-30 14:29:21 +000081NVPTXTargetMachine32::NVPTXTargetMachine32(
82 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
83 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
84 CodeGenOpt::Level OL)
85 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
Justin Holewinskiae556d32012-05-04 20:18:50 +000086
87void NVPTXTargetMachine64::anchor() {}
88
Justin Holewinski0497ab12013-03-30 14:29:21 +000089NVPTXTargetMachine64::NVPTXTargetMachine64(
90 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
91 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
92 CodeGenOpt::Level OL)
93 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
Justin Holewinskiae556d32012-05-04 20:18:50 +000094
95namespace llvm {
96class NVPTXPassConfig : public TargetPassConfig {
97public:
98 NVPTXPassConfig(NVPTXTargetMachine *TM, PassManagerBase &PM)
Justin Holewinski0497ab12013-03-30 14:29:21 +000099 : TargetPassConfig(TM, PM) {}
Justin Holewinskiae556d32012-05-04 20:18:50 +0000100
101 NVPTXTargetMachine &getNVPTXTargetMachine() const {
102 return getTM<NVPTXTargetMachine>();
103 }
104
105 virtual bool addInstSelector();
106 virtual bool addPreRegAlloc();
107};
108}
109
110TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) {
111 NVPTXPassConfig *PassConfig = new NVPTXPassConfig(this, PM);
112 return PassConfig;
113}
114
115bool NVPTXPassConfig::addInstSelector() {
Bob Wilsonbbd38dd2012-07-02 19:48:31 +0000116 addPass(createLowerAggrCopies());
117 addPass(createSplitBBatBarPass());
118 addPass(createAllocaHoisting());
119 addPass(createNVPTXISelDag(getNVPTXTargetMachine(), getOptLevel()));
Justin Holewinskiae556d32012-05-04 20:18:50 +0000120 return false;
121}
122
Justin Holewinski0497ab12013-03-30 14:29:21 +0000123bool NVPTXPassConfig::addPreRegAlloc() { return false; }