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gerrit-public.fairphone.software / toolchain / llvm-project / 23af64846f29e8249c717cad08ae64afc2ba647b / . / llvm / test / CodeGen / ARM / neon-spfp.ll
blob: 4eeaa8abfab2311640e3e91014d33a82a8379475 [file] [log] [blame]
Tim Northover501977e2013-08-12 12:43:26 +0000[diff] [blame]1; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 | FileCheck %s -check-prefix=CHECK-LINUXA5
2; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-LINUXA8
3; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK-LINUXA9
4; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 | FileCheck %s -check-prefix=CHECK-LINUXA15
5; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift | FileCheck %s -check-prefix=CHECK-LINUXSWIFT
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]6
Tim Northover501977e2013-08-12 12:43:26 +0000[diff] [blame]7; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA5
8; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA8
9; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA9
10; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA15
11; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFESWIFT
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]12
Tim Northover501977e2013-08-12 12:43:26 +0000[diff] [blame]13; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a5 | FileCheck %s -check-prefix=CHECK-DARWINA5
14; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-DARWINA8
15; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK-DARWINA9
16; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a15 | FileCheck %s -check-prefix=CHECK-DARWINA15
17; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=swift | FileCheck %s -check-prefix=CHECK-DARWINSWIFT
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]18
19; This test makes sure we're not lowering VMUL.f32 D* (aka. NEON) for single-prec. FP ops, since
20; NEON is not fully IEEE 754 compliant, unless unsafe-math is selected.
21
22@.str = private unnamed_addr constant [12 x i8] c"S317\09%.5g \0A\00", align 1
23
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]24; CHECK-LINUXA5-LABEL: main:
25; CHECK-LINUXA8-LABEL: main:
26; CHECK-LINUXA9-LABEL: main:
27; CHECK-LINUXA15-LABEL: main:
28; CHECK-LINUXSWIFT-LABEL: main:
29; CHECK-UNSAFEA5-LABEL: main:
30; CHECK-UNSAFEA8-LABEL: main:
31; CHECK-UNSAFEA9-LABEL: main:
32; CHECK-UNSAFEA15-LABEL: main:
33; CHECK-UNSAFESWIFT-LABEL: main:
34; CHECK-DARWINA5-LABEL: main:
35; CHECK-DARWINA8-LABEL: main:
36; CHECK-DARWINA9-LABEL: main:
37; CHECK-DARWINA15-LABEL: main:
38; CHECK-DARWINSWIFT-LABEL: main:
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]39define i32 @main() {
40entry:
41 br label %for.body
42
43for.body: ; preds = %for.body, %entry
44 %i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
45 %q.03 = phi float [ 1.000000e+00, %entry ], [ %mul, %for.body ]
46 %mul = fmul float %q.03, 0x3FEFAE1480000000
47; CHECK-LINUXA5: vmul.f32 s{{[0-9]*}}
48; CHECK-LINUXA8: vmul.f32 s{{[0-9]*}}
49; CHECK-LINUXA9: vmul.f32 s{{[0-9]*}}
50; CHECK-LINUXA15: vmul.f32 s{{[0-9]*}}
51; Swift is *always* unsafe
52; CHECK-LINUXSWIFT: vmul.f32 d{{[0-9]*}}
53
54; CHECK-UNSAFEA5: vmul.f32 d{{[0-9]*}}
55; CHECK-UNSAFEA8: vmul.f32 d{{[0-9]*}}
56; A9 and A15 don't need this
57; CHECK-UNSAFEA9: vmul.f32 s{{[0-9]*}}
58; CHECK-UNSAFEA15: vmul.f32 s{{[0-9]*}}
59; CHECK-UNSAFESWIFT: vmul.f32 d{{[0-9]*}}
60
61; CHECK-DARWINA5: vmul.f32 d{{[0-9]*}}
62; CHECK-DARWINA8: vmul.f32 d{{[0-9]*}}
63; CHECK-DARWINA9: vmul.f32 s{{[0-9]*}}
64; CHECK-DARWINA15: vmul.f32 s{{[0-9]*}}
65; CHECK-DARWINSWIFT: vmul.f32 d{{[0-9]*}}
66 %conv = fpext float %mul to double
David Blaikie23af6482015-04-16 23:24:18 +0000[diff] [blame^]67 %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i32 0, i32 0), double %conv) #1
Renato Golinb4dd6c52013-03-21 18:47:47 +0000[diff] [blame]68 %inc = add nsw i32 %i.04, 1
69 %exitcond = icmp eq i32 %inc, 16000
70 br i1 %exitcond, label %for.end, label %for.body
71
72for.end: ; preds = %for.body
73 ret i32 0
74}
75
76declare i32 @printf(i8* nocapture, ...)