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gerrit-public.fairphone.software / toolchain / llvm-project / c2836079df8fd3aacf6486be18c097ac45317ebf / . / llvm / test / CodeGen / R600 / fp_to_sint.ll
blob: 35cfb03d39b4be3f7da527071b31772f16a1dc2f [file] [log] [blame]
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]1; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=EG --check-prefix=FUNC
Tom Stellard49f8bfd2015-01-06 18:00:21 +0000[diff] [blame]2; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]3
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]4; FUNC-LABEL: {{^}}fp_to_sint_i32:
Matt Arsenault42d15652014-09-25 23:16:18 +0000[diff] [blame]5; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]6; SI: v_cvt_i32_f32_e32
7; SI: s_endpgm
Matt Arsenault42d15652014-09-25 23:16:18 +0000[diff] [blame]8define void @fp_to_sint_i32 (i32 addrspace(1)* %out, float %in) {
9 %conv = fptosi float %in to i32
10 store i32 %conv, i32 addrspace(1)* %out
11 ret void
12}
13
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]14; FUNC-LABEL: {{^}}fp_to_sint_v2i32:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]15; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
16; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]17; SI: v_cvt_i32_f32_e32
18; SI: v_cvt_i32_f32_e32
Tom Stellard0344cdf2013-08-01 15:23:42 +0000[diff] [blame]19define void @fp_to_sint_v2i32(<2 x i32> addrspace(1)* %out, <2 x float> %in) {
20 %result = fptosi <2 x float> %in to <2 x i32>
21 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
22 ret void
23}
24
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]25; FUNC-LABEL: {{^}}fp_to_sint_v4i32:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]26; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
27; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW]}}
28; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
29; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]30; SI: v_cvt_i32_f32_e32
31; SI: v_cvt_i32_f32_e32
32; SI: v_cvt_i32_f32_e32
33; SI: v_cvt_i32_f32_e32
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]34define void @fp_to_sint_v4i32(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
35 %value = load <4 x float> addrspace(1) * %in
36 %result = fptosi <4 x float> %value to <4 x i32>
37 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
38 ret void
39}
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]40
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]41; FUNC-LABEL: {{^}}fp_to_sint_i64:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]42
43; EG-DAG: AND_INT
44; EG-DAG: LSHR
45; EG-DAG: SUB_INT
46; EG-DAG: AND_INT
47; EG-DAG: ASHR
48; EG-DAG: AND_INT
49; EG-DAG: OR_INT
50; EG-DAG: SUB_INT
51; EG-DAG: LSHL
52; EG-DAG: LSHL
53; EG-DAG: SUB_INT
54; EG-DAG: LSHR
55; EG-DAG: LSHR
56; EG-DAG: SETGT_UINT
57; EG-DAG: SETGT_INT
58; EG-DAG: XOR_INT
59; EG-DAG: XOR_INT
60; EG: SUB_INT
61; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]62; EG-DAG: CNDE_INT
63; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]64
65; Check that the compiler doesn't crash with a "cannot select" error
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]66; SI: s_endpgm
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]67define void @fp_to_sint_i64 (i64 addrspace(1)* %out, float %in) {
68entry:
69 %0 = fptosi float %in to i64
70 store i64 %0, i64 addrspace(1)* %out
71 ret void
72}
73
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]74; FUNC: {{^}}fp_to_sint_v2i64:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]75; EG-DAG: AND_INT
76; EG-DAG: LSHR
77; EG-DAG: SUB_INT
78; EG-DAG: AND_INT
79; EG-DAG: ASHR
80; EG-DAG: AND_INT
81; EG-DAG: OR_INT
82; EG-DAG: SUB_INT
83; EG-DAG: LSHL
84; EG-DAG: LSHL
85; EG-DAG: SUB_INT
86; EG-DAG: LSHR
87; EG-DAG: LSHR
88; EG-DAG: SETGT_UINT
89; EG-DAG: SETGT_INT
90; EG-DAG: XOR_INT
91; EG-DAG: XOR_INT
92; EG-DAG: SUB_INT
93; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]94; EG-DAG: CNDE_INT
95; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]96; EG-DAG: AND_INT
97; EG-DAG: LSHR
98; EG-DAG: SUB_INT
99; EG-DAG: AND_INT
100; EG-DAG: ASHR
101; EG-DAG: AND_INT
102; EG-DAG: OR_INT
103; EG-DAG: SUB_INT
104; EG-DAG: LSHL
105; EG-DAG: LSHL
106; EG-DAG: SUB_INT
107; EG-DAG: LSHR
108; EG-DAG: LSHR
109; EG-DAG: SETGT_UINT
110; EG-DAG: SETGT_INT
111; EG-DAG: XOR_INT
112; EG-DAG: XOR_INT
113; EG-DAG: SUB_INT
114; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]115; EG-DAG: CNDE_INT
116; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]117
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]118; SI: s_endpgm
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]119define void @fp_to_sint_v2i64(<2 x i64> addrspace(1)* %out, <2 x float> %x) {
120 %conv = fptosi <2 x float> %x to <2 x i64>
121 store <2 x i64> %conv, <2 x i64> addrspace(1)* %out
122 ret void
123}
124
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]125; FUNC: {{^}}fp_to_sint_v4i64:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]126; EG-DAG: AND_INT
127; EG-DAG: LSHR
128; EG-DAG: SUB_INT
129; EG-DAG: AND_INT
130; EG-DAG: ASHR
131; EG-DAG: AND_INT
132; EG-DAG: OR_INT
133; EG-DAG: SUB_INT
134; EG-DAG: LSHL
135; EG-DAG: LSHL
136; EG-DAG: SUB_INT
137; EG-DAG: LSHR
138; EG-DAG: LSHR
139; EG-DAG: SETGT_UINT
140; EG-DAG: SETGT_INT
141; EG-DAG: XOR_INT
142; EG-DAG: XOR_INT
143; EG-DAG: SUB_INT
144; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]145; EG-DAG: CNDE_INT
146; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]147; EG-DAG: AND_INT
148; EG-DAG: LSHR
149; EG-DAG: SUB_INT
150; EG-DAG: AND_INT
151; EG-DAG: ASHR
152; EG-DAG: AND_INT
153; EG-DAG: OR_INT
154; EG-DAG: SUB_INT
155; EG-DAG: LSHL
156; EG-DAG: LSHL
157; EG-DAG: SUB_INT
158; EG-DAG: LSHR
159; EG-DAG: LSHR
160; EG-DAG: SETGT_UINT
161; EG-DAG: SETGT_INT
162; EG-DAG: XOR_INT
163; EG-DAG: XOR_INT
164; EG-DAG: SUB_INT
165; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]166; EG-DAG: CNDE_INT
167; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]168; EG-DAG: AND_INT
169; EG-DAG: LSHR
170; EG-DAG: SUB_INT
171; EG-DAG: AND_INT
172; EG-DAG: ASHR
173; EG-DAG: AND_INT
174; EG-DAG: OR_INT
175; EG-DAG: SUB_INT
176; EG-DAG: LSHL
177; EG-DAG: LSHL
178; EG-DAG: SUB_INT
179; EG-DAG: LSHR
180; EG-DAG: LSHR
181; EG-DAG: SETGT_UINT
182; EG-DAG: SETGT_INT
183; EG-DAG: XOR_INT
184; EG-DAG: XOR_INT
185; EG-DAG: SUB_INT
186; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]187; EG-DAG: CNDE_INT
188; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]189; EG-DAG: AND_INT
190; EG-DAG: LSHR
191; EG-DAG: SUB_INT
192; EG-DAG: AND_INT
193; EG-DAG: ASHR
194; EG-DAG: AND_INT
195; EG-DAG: OR_INT
196; EG-DAG: SUB_INT
197; EG-DAG: LSHL
198; EG-DAG: LSHL
199; EG-DAG: SUB_INT
200; EG-DAG: LSHR
201; EG-DAG: LSHR
202; EG-DAG: SETGT_UINT
203; EG-DAG: SETGT_INT
204; EG-DAG: XOR_INT
205; EG-DAG: XOR_INT
206; EG-DAG: SUB_INT
207; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]208; EG-DAG: CNDE_INT
209; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]210
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]211; SI: s_endpgm
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]212define void @fp_to_sint_v4i64(<4 x i64> addrspace(1)* %out, <4 x float> %x) {
213 %conv = fptosi <4 x float> %x to <4 x i64>
214 store <4 x i64> %conv, <4 x i64> addrspace(1)* %out
215 ret void
216}