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Matt Arsenault52ef4012016-07-26 16:45:58 +00001//===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Matt Arsenault52ef4012016-07-26 16:45:58 +00006//
7//===----------------------------------------------------------------------===//
8
Vincent Lejeuneace6f732013-04-01 21:47:53 +00009#include "AMDGPUMachineFunction.h"
Matt Arsenault52ef4012016-07-26 16:45:58 +000010#include "AMDGPUSubtarget.h"
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000011#include "AMDGPUPerfHintAnalysis.h"
12#include "llvm/CodeGen/MachineModuleInfo.h"
Matt Arsenaulte935f052016-06-18 05:15:53 +000013
Craig Topper8fc40962013-07-17 00:31:35 +000014using namespace llvm;
Vincent Lejeuneace6f732013-04-01 21:47:53 +000015
Vincent Lejeuneace6f732013-04-01 21:47:53 +000016AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
Matt Arsenault762af962014-07-13 03:06:39 +000017 MachineFunctionInfo(),
Matt Arsenault52ef4012016-07-26 16:45:58 +000018 LocalMemoryObjects(),
Matt Arsenault75e71922018-06-28 10:18:55 +000019 ExplicitKernArgSize(0),
Matt Arsenaulte935f052016-06-18 05:15:53 +000020 MaxKernArgAlign(0),
Matt Arsenault3f981402014-09-15 15:41:53 +000021 LDSSize(0),
Matthias Braunf1caa282017-12-15 22:22:58 +000022 IsEntryFunction(AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())),
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000023 NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath),
24 MemoryBound(false),
25 WaveLimiter(false) {
Matt Arsenault4bec7d42018-07-20 09:05:08 +000026 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
27
Matt Arsenault52ef4012016-07-26 16:45:58 +000028 // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
29 // except reserved size is not correctly aligned.
Matt Arsenault4bec7d42018-07-20 09:05:08 +000030 const Function &F = MF.getFunction();
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000031
32 if (auto *Resolver = MF.getMMI().getResolver()) {
33 if (AMDGPUPerfHintAnalysis *PHA = static_cast<AMDGPUPerfHintAnalysis*>(
34 Resolver->getAnalysisIfAvailable(&AMDGPUPerfHintAnalysisID, true))) {
Matt Arsenault4bec7d42018-07-20 09:05:08 +000035 MemoryBound = PHA->isMemoryBound(&F);
36 WaveLimiter = PHA->needsWaveLimiter(&F);
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000037 }
38 }
Matt Arsenault4bec7d42018-07-20 09:05:08 +000039
40 CallingConv::ID CC = F.getCallingConv();
41 if (CC == CallingConv::AMDGPU_KERNEL || CC == CallingConv::SPIR_KERNEL)
42 ExplicitKernArgSize = ST.getExplicitKernArgSize(F, MaxKernArgAlign);
Nikolay Haustovbeb24f52016-07-01 10:00:58 +000043}
44
Matt Arsenault52ef4012016-07-26 16:45:58 +000045unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,
46 const GlobalValue &GV) {
47 auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0));
48 if (!Entry.second)
49 return Entry.first->second;
50
51 unsigned Align = GV.getAlignment();
52 if (Align == 0)
53 Align = DL.getABITypeAlignment(GV.getValueType());
54
55 /// TODO: We should sort these to minimize wasted space due to alignment
56 /// padding. Currently the padding is decided by the first encountered use
57 /// during lowering.
58 unsigned Offset = LDSSize = alignTo(LDSSize, Align);
59
60 Entry.first->second = Offset;
61 LDSSize += DL.getTypeAllocSize(GV.getValueType());
62
63 return Offset;
Nikolay Haustovbeb24f52016-07-01 10:00:58 +000064}